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001387526 008__ 130208s1989\\\\maua\\\\ob\\\\001\0\eng\d
001387526 020__ $$a0262256029$$q(electronic bk.)
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001387526 035__ $$a(OCoLC)827012431$$z(OCoLC)909153186
001387526 035__ $$a(OCoLC-P)827012431
001387526 040__ $$aOCoLC-P$$beng$$epn$$cOCoLC-P
001387526 050_4 $$aTK7868.S9$$bD55 1989eb
001387526 08204 $$a621.39/5$$222
001387526 1001_ $$aDill, David L.
001387526 24510 $$aTrace theory for automatic hierarchical verification of speed-independent circuits /$$cDavid L. Dill.
001387526 260__ $$aCambridge, Mass. :$$bMIT Press,$$c©1989.
001387526 300__ $$a1 online resource (163 pages) :$$billustrations.
001387526 336__ $$atext$$btxt$$2rdacontent
001387526 337__ $$acomputer$$bc$$2rdamedia
001387526 338__ $$aonline resource$$bcr$$2rdacarrier
001387526 4901_ $$aACM distinguished dissertations
001387526 506__ $$aAccess limited to authorized users.
001387526 5203_ $$a"Speed-independent circuits offer a potential solution to the timing problems of VLSI. In this book David Dill develops and implements a theory for practical automatic verification of these control circuits. He describes a formal model of circuit operation, defines the proper relationship between an implementation and its specification, and constructs a computer program that can check this relationship.Asynchronous or speed-independent circuit design has gained renewed interest in the VLSI community because of the possibilities it provides for dealing with problems that arise with the increasing complexity of VLSI circuits. Speed-independent circuits offer a way around such phenomena as clock skew, which can be a serious obstacle in the design of large systems. They can expedite circuit design by reducing design time and simplifying the overall process.A major challenge to the successful utilization of speed-independent circuits is correctness. The verification method described here insures that a design is correct and because it can be automated it is a significant advantage over manual verification. Dill proposes two distinct theories - prefix-closed trace structures, which can model and specify safety properties, and complete trace structures, which can also deal with liveness and fairness properties."
001387526 588__ $$aOCLC-licensed vendor bibliographic record.
001387526 650_0 $$aSwitching circuits.
001387526 650_0 $$aIntegrated circuits$$xVery large scale integration.
001387526 650_0 $$aSequential machine theory.
001387526 650_0 $$aIntegrated circuits$$xVerification.
001387526 653_0 $$a11030$$acomputers$$ap1030$$aintegrated circuits$$alarge scale$$avery
001387526 653_0 $$aElectronic digital computers$$aCircuits
001387526 653_0 $$aIntegrated circuits$$aVerification
001387526 653_0 $$aIntegrated circuits$$aVery large scale integration
001387526 653_0 $$aSequential machine theory
001387526 653_0 $$aSwitching circuits
001387526 653__ $$aCOMPUTER SCIENCE/General
001387526 655_0 $$aElectronic books
001387526 852__ $$bebk
001387526 85640 $$3MIT Press$$uhttps://univsouthin.idm.oclc.org/login?url=https://doi.org/10.7551/mitpress/6874.001.0001?locatt=mode:legacy$$zOnline Access through The MIT Press Direct
001387526 85642 $$3OCLC metadata license agreement$$uhttp://www.oclc.org/content/dam/oclc/forms/terms/vbrl-201703.pdf
001387526 909CO $$ooai:library.usi.edu:1387526$$pGLOBAL_SET
001387526 980__ $$aBIB
001387526 980__ $$aEBOOK
001387526 982__ $$aEbook
001387526 983__ $$aOnline