TY - GEN N2 - This book covers selected topics of automated logic synthesis dedicated to FPGAs. The authors focused on two main problems: decomposition of the multioutput functions and technology mapping. Additionally, the idea of using binary decision diagrams (BDD) in these processes was presented. The book is a scientific monograph summarizing the authors' many years of research. As a result, it contains a large number of experimental results, which makes it a valuable source for other researchers. The book has a significant didactic value. Its arrangement allows for a gradual transition from basic things (e.g., description of logic functions) to much more complex issues. This approach allows less advanced readers to better understand the described problems. In addition, the authors made sure that the issues described in the book were supported by practical examples, thanks to which the reader can independently analyze even the most complex problems described in the book. DO - 10.1007/978-3-030-60488-2 DO - doi AB - This book covers selected topics of automated logic synthesis dedicated to FPGAs. The authors focused on two main problems: decomposition of the multioutput functions and technology mapping. Additionally, the idea of using binary decision diagrams (BDD) in these processes was presented. The book is a scientific monograph summarizing the authors' many years of research. As a result, it contains a large number of experimental results, which makes it a valuable source for other researchers. The book has a significant didactic value. Its arrangement allows for a gradual transition from basic things (e.g., description of logic functions) to much more complex issues. This approach allows less advanced readers to better understand the described problems. In addition, the authors made sure that the issues described in the book were supported by practical examples, thanks to which the reader can independently analyze even the most complex problems described in the book. T1 - Technology mapping for LUT-based FPGA / AU - Kubica, Marcin AU - Opara, Adam, AU - Kania, Dariusz, VL - volume 713 CN - TK7895.G36 ID - 1432833 KW - Field programmable gate arrays. KW - Programmable array logic. KW - Gate array circuits. KW - Réseaux logiques programmables par l'utilisateur. KW - Logique à réseau programmable. KW - Circuits prédiffusés. SN - 9783030604882 SN - 3030604888 TI - Technology mapping for LUT-based FPGA / LK - https://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-030-60488-2 UR - https://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-030-60488-2 ER -