001433226 000__ 03667cam\a2200769\i\4500
001433226 001__ 1433226
001433226 003__ OCoLC
001433226 005__ 20230309003555.0
001433226 006__ m\\\\\o\\d\\\\\\\\
001433226 007__ cr\un\nnnunnun
001433226 008__ 201027s2021\\\\sz\\\\\\ob\\\\001\0\eng\d
001433226 019__ $$a1202439403$$a1204140234$$a1237484510
001433226 020__ $$a9783030576820$$q(electronic bk.)
001433226 020__ $$a3030576825$$q(electronic bk.)
001433226 020__ $$z3030576817
001433226 020__ $$z9783030576813
001433226 0247_ $$a10.1007/978-3-030-57682-0$$2doi
001433226 035__ $$aSP(OCoLC)1228844470
001433226 040__ $$aUPM$$beng$$epn$$cUPM$$dOCLCO$$dOCLCQ$$dYDXIT$$dGW5XE$$dYDX$$dEBLCP$$dUKAHL$$dOCLCF$$dOCLCO$$dN$T$$dOCLCO$$dOCLCQ$$dCOM$$dOCLCQ
001433226 049__ $$aISEA
001433226 050_4 $$aTK5102.94
001433226 050_4 $$aTK7888.4$$b.S66 2021
001433226 08204 $$a005.8/24$$223
001433226 08204 $$a621.3815$$223
001433226 1001_ $$aSoni, Deepraj,$$eauthor
001433226 24510 $$aHardware architectures for post-quantum digital signature schemes /$$cDeepraj Soni, Kanad Basu, Mohammed Nabeel, Najwa Aaraj, Marc Manzano, Ramesh Karri.
001433226 264_1 $$aCham :$$bSpringer,$$c2021.
001433226 300__ $$a1 online resource
001433226 336__ $$atext$$btxt$$2rdacontent
001433226 337__ $$acomputer$$bc$$2rdamedia
001433226 338__ $$aonline resource$$bcr$$2rdacarrier
001433226 347__ $$atext file
001433226 347__ $$bPDF
001433226 504__ $$aIncludes bibliographical references and index.
001433226 5050_ $$aIntroduction -- qTESLA -- CRYSTALS -Dilithium -- MQDSS -- SPHINCS -- Luov -- Falcon -- Picnic -- GeMSS -- Power, Performance, Area, and Security (PPAS) Comparison of the PQC Algorithms -- Conclusions.
001433226 506__ $$aAccess limited to authorized users.
001433226 520__ $$aThis book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs. Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based; Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms; Enables designers to build hardware implementations that are resilient to a variety of side-channels.
001433226 650_0 $$aCryptography.
001433226 650_0 $$aComputer algorithms.
001433226 650_0 $$aQuantum computing.
001433226 650_0 $$aC (Computer program language)
001433226 650_0 $$aComputer engineering.
001433226 650_0 $$aInternet of things.
001433226 650_0 $$aEmbedded computer systems.
001433226 650_0 $$aMicroprocessors.
001433226 650_6 $$aCryptographie.
001433226 650_6 $$aAlgorithmes.
001433226 650_6 $$aInformatique quantique.
001433226 650_6 $$aC (Langage de programmation)
001433226 650_6 $$aOrdinateurs$$xConception et construction.
001433226 650_6 $$aInternet des objets.
001433226 650_6 $$aSystèmes enfouis (Informatique)
001433226 655_0 $$aElectronic books.
001433226 7001_ $$aBasu, Kanad,$$eauthor
001433226 7001_ $$aNabeel, Mohammed,$$eauthor
001433226 7001_ $$aAaraj, Najwa,$$d1983-$$eauthor.
001433226 7001_ $$aManzano, Marc,$$eauthor
001433226 7001_ $$aKarri, Ramesh,$$eauthor.
001433226 77608 $$iPrint version:$$z9783030576813
001433226 77608 $$iPrint version:$$z9783030576837
001433226 77608 $$iPrint version:$$z9783030576844
001433226 852__ $$bebk
001433226 85640 $$3Springer Nature$$uhttps://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-030-57682-0$$zOnline Access$$91397441.1
001433226 909CO $$ooai:library.usi.edu:1433226$$pGLOBAL_SET
001433226 980__ $$aBIB
001433226 980__ $$aEBOOK
001433226 982__ $$aEbook
001433226 983__ $$aOnline
001433226 994__ $$a92$$bISE