001434894 000__ 04496cam\a2200565\i\4500
001434894 001__ 1434894
001434894 003__ OCoLC
001434894 005__ 20230309003825.0
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001434894 008__ 210316s2021\\\\sz\\\\\\ob\\\\001\0\eng\d
001434894 019__ $$a1241448323
001434894 020__ $$a9783030683689$$q(electronic bk.)
001434894 020__ $$a3030683680$$q(electronic bk.)
001434894 020__ $$z9783030683672
001434894 020__ $$z3030683672
001434894 0247_ $$a10.1007/978-3-030-68368-9$$2doi
001434894 035__ $$aSP(OCoLC)1241732298
001434894 040__ $$aYDX$$beng$$erda$$epn$$cYDX$$dGW5XE$$dEBLCP$$dOCLCO$$dOCLCF$$dUKAHL$$dOCLCO$$dOCLCQ$$dCOM$$dOCLCQ
001434894 049__ $$aISEA
001434894 050_4 $$aTK7871.95
001434894 08204 $$a621.3815/284$$223
001434894 1001_ $$aZimpeck, Alexandra,$$eauthor.
001434894 24510 $$aMitigating process variability and soft errors at circuit-level for FinFETs /$$cAlexandra Zimpeck, Cristina Meinhardt, Laurent Artola, Ricardo Reis.
001434894 264_1 $$aCham :$$bSpringer,$$c[2021]
001434894 300__ $$a1 online resource
001434894 336__ $$atext$$btxt$$2rdacontent
001434894 337__ $$acomputer$$bc$$2rdamedia
001434894 338__ $$aonline resource$$bcr$$2rdacarrier
001434894 504__ $$aIncludes bibliographical references and index.
001434894 5050_ $$aChapter 1. Introduction -- Chapter 2. FinFET Technology -- Chapter 3. Reliability Challenges in FinFETs -- Chapter 4. Circuit-Level Mitigation Approaches -- Chapter 5. Evaluation Methodology -- Chapter 6. Process Variability Mitigation -- Chapter 7. Soft Error Mitigation -- Chapter 8. General Trade-offs -- Chapter 9. Final Remarks.
001434894 506__ $$aAccess limited to authorized users.
001434894 520__ $$aThis book evaluates the influence of process variations (e.g. work-function fluctuations) and radiation-induced soft errors in a set of logic cells using FinFET technology, considering the 7nm technological node as a case study. Moreover, for accurate soft error estimation, the authors adopt a radiation event generator tool (MUSCA SEP3), which deals both with layout features and electrical properties of devices. The authors also explore four circuit-level techniques (e.g. transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor) as alternatives to attenuate the unwanted effects on FinFET logic cells. This book also evaluates the mitigation tendency when different levels of process variation, transistor sizing, and radiation particle characteristics are applied in the design. An overall comparison of all methods addressed by this work is provided allowing to trace a trade-off between the reliability gains and the design penalties of each approach regarding the area, performance, power consumption, single event transient (SET) pulse width, and SET cross-section. Explains how to measure the influence of process variability (e.g. work-function fluctuations) and radiation-induced soft errors in FinFET logic cells; Enables designers to improve the robustness of FinFET integrated circuits without focusing on manufacturing adjustments; Discusses the benefits and downsides of using circuit-level approaches such as transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor for mitigating the impact of process variability and soft errors; Evaluates the techniques described in the context of different test scenarios: distinct levels of process variations, transistor sizing, and different radiation features; Helps readers identify the best circuit design considering the target application and design requirements like area constraints or power/delay limitations.
001434894 588__ $$aOnline resource; title from PDF title page (SpringerLink, viewed April 13, 2021).
001434894 650_0 $$aField-effect transistors$$xDesign and construction.
001434894 650_0 $$aField-effect transistors$$xReliability.
001434894 650_0 $$aSoft errors (Computer science)
001434894 650_6 $$aTransistors à effet de champ$$xFiabilité.
001434894 650_6 $$aErreurs temporaires (Informatique)
001434894 655_0 $$aElectronic books.
001434894 7001_ $$aMeinhardt, Cristina,$$eauthor.
001434894 7001_ $$aArtola, Laurent,$$eauthor.
001434894 7001_ $$aReis, Ricardo A. L.$$q(Ricardo Augusto da Luz),$$eauthor.
001434894 77608 $$iPrint version:$$aZimpeck, Alexandra.$$tMitigating process variability and soft errors at circuit-level for FinFETs.$$dCham : Springer, [2021]$$z3030683672$$z9783030683672$$w(OCoLC)1228316666
001434894 852__ $$bebk
001434894 85640 $$3Springer Nature$$uhttps://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-030-68368-9$$zOnline Access$$91397441.1
001434894 909CO $$ooai:library.usi.edu:1434894$$pGLOBAL_SET
001434894 980__ $$aBIB
001434894 980__ $$aEBOOK
001434894 982__ $$aEbook
001434894 983__ $$aOnline
001434894 994__ $$a92$$bISE