001436242 000__ 04134cam\a2200577\a\4500
001436242 001__ 1436242
001436242 003__ OCoLC
001436242 005__ 20230309004016.0
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001436242 007__ cr\un\nnnunnun
001436242 008__ 210501s2021\\\\sz\\\\\\ob\\\\001\0\eng\d
001436242 019__ $$a1248900194
001436242 020__ $$a9783030692094$$q(electronic bk.)
001436242 020__ $$a3030692094$$q(electronic bk.)
001436242 020__ $$z9783030692087$$q(print)
001436242 020__ $$z3030692086
001436242 0247_ $$a10.1007/978-3-030-69209-4$$2doi
001436242 035__ $$aSP(OCoLC)1249472082
001436242 040__ $$aEBLCP$$beng$$epn$$cEBLCP$$dGW5XE$$dOCLCO$$dYDX$$dEBLCP$$dOCLCF$$dUKAHL$$dOCLCQ$$dOCLCO$$dCOM$$dOCLCO$$dOCLCQ
001436242 049__ $$aISEA
001436242 050_4 $$aTK7874
001436242 08204 $$a621.3815$$223
001436242 1001_ $$aHuhn, Sebastian.
001436242 24510 $$aDesign for testability, debug and reliability :$$bnext generation measures using formal techniques /$$cSebastian Huhn, Rolf Drechsler.
001436242 260__ $$aCham :$$bSpringer,$$c2021.
001436242 300__ $$a1 online resource (177 pages)
001436242 336__ $$atext$$btxt$$2rdacontent
001436242 337__ $$acomputer$$bc$$2rdamedia
001436242 338__ $$aonline resource$$bcr$$2rdacarrier
001436242 504__ $$aIncludes bibliographical references and index.
001436242 5050_ $$aIntroduction -- Integrated Circuits -- Formal Techniques -- Embedded Compression Architecture for Test Access Ports -- Optimization SAT-based Retargeting for Embedded Compression -- Reconfigurable TAP Controllers with Embedded Compression -- Embedded Multichannel Test Compression for Low-Pin Count Test -- Enhanced Reliability using Formal Techniques -- Conclusion and Outlook.
001436242 506__ $$aAccess limited to authorized users.
001436242 520__ $$aThis book introduces several novel approaches to pave the way for the next generation of integrated circuits, which can be successfully and reliably integrated, even in safety-critical applications. The authors describe new measures to address the rising challenges in the field of design for testability, debug, and reliability, as strictly required for state-of-the-art circuit designs. In particular, this book combines formal techniques, such as the Satisfiability (SAT) problem and the Bounded Model Checking (BMC), to address the arising challenges concerning the increase in test data volume, as well as test application time and the required reliability. All methods are discussed in detail and evaluated extensively, while considering industry-relevant benchmark candidates. All measures have been integrated into a common framework, which implements standardized software/hardware interfaces. Provides readers with a combination of a comprehensive set of formal techniques covering and enhancing different aspects of the state-of-the-art design and test flow for ICs; Introduces newly developed heuristic, formal optimization-based and partition-based retargeting techniques and integrates them into a common framework; Describes fully compliant (with respect to industrial de-facto standard) measures to enhance the DFT, DFD and DFR capabilities while supporting standardized data exchange formats; Includes new measures to tackle shortcomings of existing state-of-the-art methods, including zero-defect enforcing safety-critical applications.
001436242 588__ $$aDescription based on print version record.
001436242 588__ $$aOnline resource; title from PDF title page (SpringerLink, viewed May 4, 2021).
001436242 650_0 $$aIntegrated circuits$$xDesign and construction.
001436242 650_0 $$aIntegrated circuits$$xTesting.
001436242 650_0 $$aDebugging in computer science.
001436242 650_0 $$aIntegrated circuits$$xReliability.
001436242 650_6 $$aCircuits intégrés$$xConception et construction.
001436242 650_6 $$aDébogage.
001436242 650_6 $$aCircuits intégrés$$xFiabilité.
001436242 655_0 $$aElectronic books.
001436242 7001_ $$aDrechsler, Rolf.
001436242 77608 $$iPrint version:$$aHuhn, Sebastian.$$tDesign for Testability, Debug and Reliability.$$dCham : Springer International Publishing AG, ©2021$$z9783030692087
001436242 852__ $$bebk
001436242 85640 $$3Springer Nature$$uhttps://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-030-69209-4$$zOnline Access$$91397441.1
001436242 909CO $$ooai:library.usi.edu:1436242$$pGLOBAL_SET
001436242 980__ $$aBIB
001436242 980__ $$aEBOOK
001436242 982__ $$aEbook
001436242 983__ $$aOnline
001436242 994__ $$a92$$bISE