TY  - GEN
N2  - This book provides comprehensive coverage of Network-on-Chip (NoC) security vulnerabilities and state-of-the-art countermeasures, with contributions from System-on-Chip (SoC) designers, academic researchers and hardware security experts. Readers will gain a clear understanding of the existing security solutions for on-chip communication architectures and how they can be utilized effectively to design secure and trustworthy systems. Provides a comprehensive overview of NoC security vulnerabilities for diverse on-chip communication architectures, including bus, mesh, ring, star, and hybrid network topologies; Describes state-of-the-art security solutions for defending against a wide spectrum of attacks, including malicious implants (e.g., hardware Trojans), eavesdropping, information leakage, spoofing, denial-of-service, and erroneous execution; Covers a wide variety of NoC attacks and effective countermeasures for diverse communication technologies, including electrical, optical (photonic) and wireless NoCs; Presents lightweight static (design-for-trust), as well as dynamic (runtime) security solutions; Enables security validation using an effective combination of formal methods, assertion-based validation, side-channel analysis, and machine learning; Discusses trade-offs between on-chip communication security and energy-efficient implementation in resource constrained embedded systems and IoT devices.
DO  - 10.1007/978-3-030-69131-8
DO  - doi
AB  - This book provides comprehensive coverage of Network-on-Chip (NoC) security vulnerabilities and state-of-the-art countermeasures, with contributions from System-on-Chip (SoC) designers, academic researchers and hardware security experts. Readers will gain a clear understanding of the existing security solutions for on-chip communication architectures and how they can be utilized effectively to design secure and trustworthy systems. Provides a comprehensive overview of NoC security vulnerabilities for diverse on-chip communication architectures, including bus, mesh, ring, star, and hybrid network topologies; Describes state-of-the-art security solutions for defending against a wide spectrum of attacks, including malicious implants (e.g., hardware Trojans), eavesdropping, information leakage, spoofing, denial-of-service, and erroneous execution; Covers a wide variety of NoC attacks and effective countermeasures for diverse communication technologies, including electrical, optical (photonic) and wireless NoCs; Presents lightweight static (design-for-trust), as well as dynamic (runtime) security solutions; Enables security validation using an effective combination of formal methods, assertion-based validation, side-channel analysis, and machine learning; Discusses trade-offs between on-chip communication security and energy-efficient implementation in resource constrained embedded systems and IoT devices.
T1  - Network-on-chip security and privacy /
DA  - 2021.
CY  - Cham :
AU  - Mishra, Prabhat,
AU  - Charles, Subodha,
CN  - TK5105.546
PB  - Springer,
PP  - Cham :
PY  - 2021.
N1  - Includes index.
ID  - 1436452
KW  - Networks on a chip
KW  - Réseaux sur puce
SN  - 9783030691318
SN  - 3030691314
TI  - Network-on-chip security and privacy /
LK  - https://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-030-69131-8
UR  - https://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-030-69131-8
ER  -