Self aware security for real time task schedules in reconfigurable hardware platforms / Krishnendu Guha, Sangeet Saha, Amlan Chakrabarti.
2021
TK7892.E42
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Title
Self aware security for real time task schedules in reconfigurable hardware platforms / Krishnendu Guha, Sangeet Saha, Amlan Chakrabarti.
Author
ISBN
9783030797010 (electronic bk.)
3030797015 (electronic bk.)
3030797007
9783030797003
3030797015 (electronic bk.)
3030797007
9783030797003
Publication Details
Cham, Switzerland : Springer, 2021.
Language
English
Description
1 online resource
Item Number
10.1007/978-3-030-79701-0 doi
Call Number
TK7892.E42
Dewey Decimal Classification
005.8
Summary
This book focuses on how real-time task schedules for reconfigurable hardware-based embedded platforms may be affected due to the vulnerability of hardware and proposes self-aware security strategies to counteract the various threats. The emergence of Industry 4.0 has witnessed the deployment of reconfigurable hardware or field programmable gate arrays (FPGAs) in diverse embedded applications. These are associated with the execution of several real-time tasks arranged in schedules. However, they are associated with several issues. Development of fully and partially reconfigurable task schedules are discussed that eradicates the existing problems. However, such real-time task schedules may be jeopardized due to hardware threats. Analysis of such threats is discussed and self-aware security techniques are proposed that can detect and mitigate such threats at runtime.
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Includes bibliographical references.
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Source of Description
Online resource; title from PDF title page (SpringerLink, viewed September 14, 2021).
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Table of Contents
Introduction
Real-time Scheduling : Background and Trends
Scheduling Algorithms for Recongurable Systems
Introduction to Hardware Security for FPGA based Systems
Bypassing Passive Attacks
Counteracting Active Attacks
Handling Power Draining Attacks.
Real-time Scheduling : Background and Trends
Scheduling Algorithms for Recongurable Systems
Introduction to Hardware Security for FPGA based Systems
Bypassing Passive Attacks
Counteracting Active Attacks
Handling Power Draining Attacks.