@article{1442626,
      recid = {1442626},
      author = {Taraate, Vaibbhav,},
      title = {Digital logic design using Verilog : coding and RTL  synthesis /},
      pages = {1 online resource :},
      abstract = {This second edition focuses on the thought process of  digital design and implementation in the context of VLSI  and system design. It covers the Verilog 2001 and Verilog  2005 RTL design styles, constructs and the optimization at  the RTL and synthesis level. The book also covers the logic  synthesis, low power, multiple clock domain design concepts  and design performance improvement techniques. The book  includes 250 design examples/illustrations and 100 exercise  questions. This volume can be used as a core or  supplementary text in undergraduate courses on logic design  and as a text for professional and vocational coursework.  In addition, it will be a hands-on professional reference  and a self-study aid for hobbyists.},
      url = {http://library.usi.edu/record/1442626},
      doi = {https://doi.org/10.1007/978-981-16-3199-3},
}