001452358 000__ 05468cam\a22004937i\4500
001452358 001__ 1452358
001452358 003__ OCoLC
001452358 005__ 20230310003352.0
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001452358 020__ $$a9783031130748$$qelectronic book
001452358 020__ $$a303113074X$$qelectronic book
001452358 020__ $$z3031130731
001452358 020__ $$z9783031130731
001452358 0247_ $$a10.1007/978-3-031-13074-8$$2doi
001452358 035__ $$aSP(OCoLC)1365106728
001452358 040__ $$aGW5XE$$beng$$erda$$epn$$cGW5XE$$dYDX
001452358 049__ $$aISEA
001452358 050_4 $$aTK7867$$b.M33 2022
001452358 08204 $$a621.38150285/63$$223/eng/20230124
001452358 24500 $$aMachine learning applications in electronic design automation /$$cHaoxing Ren, Jiang Hu, editors.
001452358 264_1 $$aCham, Switzerland :$$bSpringer,$$c2022.
001452358 300__ $$a1 online resource (1 volume) :$$billustrations (black and white, and colour).
001452358 336__ $$atext$$btxt$$2rdacontent
001452358 337__ $$acomputer$$bc$$2rdamedia
001452358 338__ $$aonline resource$$bcr$$2rdacarrier
001452358 500__ $$aIncludes index.
001452358 5050_ $$aIntroduction -- Analysis of Digital Design: Routability Optimization for Industrial Designs at Sub-14nm Process Nodes Using Machine Learning -- RouteNet: Routability Prediction for Mixed-size Designs Using Convolutional Neural Network -- High Performance Graph Convolutional networks with Applications in Testability Analysis -- MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification -- GRANNITE: Graph Neural Network Inference for Transferable Power Estimation -- Machine Learning-Enabled High-Frequency Low-Power Digital Design Implementation at Advanced Process Nodes -- Optimization of Digital Design: Chip Placement with Deep Reinforcement learning -- DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement -- TreeNet: Deep Point Cloud Embedding for Routing Tree Construction -- Asynchronous Reinforcement Learning Framework for Net Order Exploration in Detailed Routing -- Standard Cell Routing with Reinforcement Learning and Genetic Algorithm in Advanced Technology Nodes -- PrefixRL: Optimization of Parallel Prefix Circuits using Deep Reinforcement Learning -- GAN-CTS: A Generative Adversarial Framework for Clock Tree Prediction and Optimization -- Analysis and Optimization of Analog Design: Machine Learning Techniques in Analog Layout Automation -- Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks -- ParaGraph: Layout parasitics and device parameter prediction using graph neural network -- GCN-RL circuit designer: Transferable transistor sizing with graph neural networks and reinforcement learn -- Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization -- Logic and Physical Verification: Deep Predictive Coverage Collection/ Dynamically Optimized Test Generation Using Machine Learning -- Novelty-Driven Verification: Using Machine Learning to Identify Novel Stimuli and Close Coverage -- Using Machine Learning Clustering To Find Large Coverage Holes -- GAN-OPC: Mask optimization with lithography-guided generative adversarial nets -- Layout hotspot detection with feature tensor generation and deep biased learning.
001452358 506__ $$aAccess limited to authorized users.
001452358 520__ $$aThis book serves as a single-source reference to key machine learning (ML) applications and methods in digital and analog design and verification. Experts from academia and industry cover a wide range of the latest research on ML applications in electronic design automation (EDA), including analysis and optimization of digital design, analysis and optimization of analog design, as well as functional verification, FPGA and system level designs, design for manufacturing (DFM), and design space exploration. The authors also cover key ML methods such as classical ML, deep learning models such as convolutional neural networks (CNNs), graph neural networks (GNNs), generative adversarial networks (GANs) and optimization methods such as reinforcement learning (RL) and Bayesian optimization (BO). All of these topics are valuable to chip designers and EDA developers and researchers working in digital and analog designs and verification. Serves as a single-source reference to key machine learning (ML) applications and methods in digital and analog design and verification; Covers classical ML methods, as well as deep learning models such as convolutional neural networks (CNNs), graph neural networks (GNNs), generative adversarial networks (GANs) and optimization methods such as reinforcement learning (RL) and Bayesian optimization (BO); Discusses machine learning MLs applications in electronic design automation (EDA), especially in the design automation of VLSI integrated circuits.
001452358 588__ $$aDescription based on print version record.
001452358 650_0 $$aElectronic circuit design$$xAutomation.
001452358 650_0 $$aMachine learning$$xIndustrial applications.
001452358 655_0 $$aElectronic books.
001452358 7001_ $$aRen, Haoxing.$$eeditor.
001452358 7001_ $$aHu, Jiang.$$eeditor.
001452358 77608 $$iPrint version:$$tMACHINE LEARNING APPLICATIONS IN ELECTRONIC DESIGN AUTOMATION.$$d[Place of publication not identified] : SPRINGER INTERNATIONAL PU, 2022$$z3031130731$$w(OCoLC)1334717193
001452358 852__ $$bebk
001452358 85640 $$3Springer Nature$$uhttps://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-031-13074-8$$zOnline Access$$91397441.1
001452358 909CO $$ooai:library.usi.edu:1452358$$pGLOBAL_SET
001452358 980__ $$aBIB
001452358 980__ $$aEBOOK
001452358 982__ $$aEbook
001452358 983__ $$aOnline
001452358 994__ $$a92$$bISE