High-speed system and analog input/output design / Thanh T. Tran.
Tran, Thanh T.
2023
TK5102.9
Available Online

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Title High-speed system and analog input/output design / Thanh T. Tran.
Author Tran, Thanh T.
Edition 2nd ed.
ISBN 9783031049545 (electronic bk.)
3031049543 (electronic bk.)
9783031049538
3031049535
DOI https://doi.org/10.1007/978-3-031-04954-5
Publication Details Cham : Springer, [2023]
Language English
Description 1 online resource (225 pages)
Item Number 10.1007/978-3-031-04954-5 doi
Call Number TK5102.9
Dewey Decimal Classification 621.39/5
Summary The new edition of this textbook is based on Dr. Thanh T. Trans 10+ years experience teaching high-speed digital and analog design courses at Rice University and 30+ years experience working in high-speed system design, including signal and power integrity in digital signal processing (DSP), computer, and embedded system. The book provides hands-on, practical instruction on high-speed digital and analog design for students and working engineers. The author first presents good high-speed digital and analog design practices that minimize both component and system noise and ensure system design success. He then presents guidelines to be used throughout the design process to reduce noise and radiation and to avoid common pitfalls while improving quality and reliability. The book is filled with tips on design and system simulation that minimize late stage redesign costs and product shipment delays. Hands-on design examples focusing on audio, video, analog filters, DDR memory, and power supplies are featured throughout. In addition, the author provides a practical approach to design multi-gigahertz high-speed serial busses (USB-C, PCIe, HDMI, DP) and simulate printed circuit board insertion and return loss using s-parameter models. Presents a practical hands-on approach to high speed system design, including spice and IBIS and s-parameter simulations; Provides design for low noise and radiation by proper printed circuit board floor planning and stackup, effective power supply decoupling techniques, grounding, and analog/digital system partitioning; Presents designs and simulations of passive and active analog filters required for analog inputs and outputs of a system, including a review of AC-coupled and DC-coupled circuits; Demonstrates the use of multiple computer aided engineering tools (spice, IBIS, and s-parameter) to solve design problems and to do critical timing analysis. Dr. Thanh Tran, a professor in the practice at Rice University and a server platform architect at AMD, earned his BSEE from the University of Illinois at Urbana-Champaign, and M.S. and Ph. D. in Electrical Engineering from the University of Houston. He is an accomplished engineer with extensive hands-on experience in architecting and designing complex systems and currently holds 37 issued patents.
Note Chapter 11: Phase-Locked Loop (PLL)
Bibliography, etc. Note Includes bibliographical references and index.
Access Note Access limited to authorized users.
Source of Description Online resource; title from PDF title page (SpringerLink, viewed August 24, 2022).
Available in Other Form High-Speed System and Analog Input/Output Design.
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Intro
Preface
Acknowledgments
Contents
About the Author
Chapter 1: Challenges in High-Speed Systems Design
1.1 High-Speed Systems Overview
1.2 Challenges of Audio System
1.3 Challenges in Video System Design
1.4 Challenges in Communication System Design
1.5 Challenges of Computer System Design
1.6 Summary
References
Chapter 2: System Design Methodology
2.1 System Design Methodology
2.2 Pre-layout Analysis
2.3 PCB Layout
2.3.1 PCB Parasitics Extraction
2.4 Spice Simulation of Critical Circuits
2.5 Summary
References

Chapter 3: AC Versus DC
3.1 Alternating Current (AC) and Direct Current (DC)
3.2 Avoiding Pitfalls in AC-Coupled and DC-Couple Circuits
References
Chapter 4: Analog Filter Design
4.1 Anti-Aliasing Filters
4.1.1 Passive and Active Filters Characteristics
4.1.2 Passive Filter Design
4.1.2.1 First-Order Passive Lowpass Filter
4.1.2.2 Second-Order Passive Filter Design
4.1.3 Active Filter Design
4.1.3.1 Operational Amplifier (Op Amp) Fundamentals
Non-Inverting Amplifier
Inverting Amplifier
4.1.3.2 Biasing Op Amps
4.1.3.3 DC and AC-Coupled Op Amp Circuits

4.1.3.4 First Order Active Filter Design
4.1.3.5 Operational Amplifier (Op Amp) Fundamentals
Sallen-Key Circuit with Gain = 1
Sallen-Key Circuit with Gain = 2
Sallen-Key Circuit with Gain = 3
1/Q
4.2 Summary
References
Chapter 5: Data Converter Overview
5.1 CPU/DSP System
5.2 Analog-to-Digital Converter (ADC)
5.2.1 Sampling
5.2.2 Quantization Noise
5.2.3 ADC Digital Output Waveforms
5.3 Digital-to-Analog Converter (DAC)
5.4 Practical Data Converter Design Considerations
5.4.1 Resolution and Signal-to-Noise
5.4.2 Sampling Frequency

5.4.3 Input and Output Voltage Range
5.4.4 Differential Nonlinearity (DNL)
5.4.5 Integral Nonlinearity (INL)
5.5 Summary
References
Chapter 6: Transmission Line (TL) Effects
6.1 Transmission Line Theory
6.2 Parallel Termination Simulations
6.3 Practical Considerations of TL
6.4 Simulations and Experimental Results of TL
6.4.1 TL Without Load or Source Termination
6.4.2 TL with Series Source Termination
6.5 Ground Grid Effects on TL
6.6 Minimizing TL Effects
References
Chapter 7: Transmission Line (TL) Effects in Frequency Domain

7.1 S-Parameter Fundamentals
7.2 Minimizing TL Effects in Frequency Domain
References
Chapter 8: Effects of Crosstalk
8.1 Current Return Paths
8.2 Crosstalk Caused by Radiation
8.3 Summary
References
Chapter 9: Memory Sub-system Design Considerations
9.1 DDR Memory Overview
9.1.1 DDR Write Cycle
9.1.2 DDR Read Cycle
9.2 DDR Memory Signal Integrity
References
Chapter 10: USB 3.1 Channel Design
10.1 USB 3.1 10 Gbps Channel Design
10.2 Layout Considerations of USB 3.1 10 Gbps Channels
10.3 USB 3.1 10 Gbps Channel Design
References

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