001459047 000__ 01806nam\a2200445\i\4500 001459047 001__ 1459047 001459047 003__ MiAaPQ 001459047 005__ 20230330003733.0 001459047 006__ m\\\\\o\\d\\\\\\\\ 001459047 007__ cr\cn\nnnunnun 001459047 008__ 170719t20182018sz\a\\\\ob\\\\001\0\eng\d 001459047 020__ $$z9783319594170 001459047 020__ $$a9783319594187 (e-book) 001459047 035__ $$a(MiAaPQ)EBC4890725 001459047 035__ $$a(Au-PeEL)EBL4890725 001459047 035__ $$a(CaPaEBR)ebr11403737 001459047 035__ $$a(OCoLC)992728359 001459047 040__ $$aMiAaPQ$$beng$$erda$$epn$$cMiAaPQ$$dMiAaPQ 001459047 050_4 $$aTK7885.7$$b.M448 2018 001459047 0820_ $$a621.392$$223 001459047 1001_ $$aMehta, Ashok B.,$$eauthor. 001459047 24510 $$aASIC/SoC functional design verification :$$ba comprehensive guide to technologies and methodologies /$$cAshok B. Mehta. 001459047 264_1 $$aCham, Switzerland :$$bSpringer,$$c2018. 001459047 264_4 $$c2018 001459047 300__ $$a1 online resource (328 pages) :$$billustrations. 001459047 336__ $$atext$$2rdacontent 001459047 337__ $$acomputer$$2rdamedia 001459047 338__ $$aonline resource$$2rdacarrier 001459047 504__ $$aIncludes bibliographical references and index. 001459047 506__ $$aAccess limited to authorized users. 001459047 588__ $$aDescription based on print version record. 001459047 650_0 $$aSystemVerilog (Computer hardware description language) 001459047 650_0 $$aApplication-specific integrated circuits$$xDesign. 001459047 655_0 $$aElectronic books 001459047 77608 $$iPrint version:$$aMehta, Ashok B.$$tASIC/SoC functional design verification : a comprehensive guide to technologies and methodologies.$$dCham, Switzerland : Springer, c2018 $$z9783319594170 $$w2017941514 001459047 852__ $$bebk 001459047 85640 $$3ProQuest Ebook Central Academic Complete $$uhttps://univsouthin.idm.oclc.org/login?url=https://ebookcentral.proquest.com/lib/usiricelib-ebooks/detail.action?docID=4890725$$zOnline Access 001459047 909CO $$ooai:library.usi.edu:1459047$$pGLOBAL_SET 001459047 980__ $$aBIB 001459047 980__ $$aEBOOK 001459047 982__ $$aEbook 001459047 983__ $$aOnline