TY  - GEN
AB  - This book explains mechanical and thermal reliability for modern memory packaging, considering materials, processes, and manufacturing. In the past 40 years, memory packaging processes have evolved enormously. This book discusses the reliability and technical challenges of first-level interconnect materials, packaging processes, advanced specialty reliability testing, and characterization of interconnects. It also examines the reliability of wire bonding, lead-free solder joints such as reliability testing and data analyses, design for reliability in hybrid packaging and HBM packaging, and failure analyses. The specialty of this book is that the materials covered are not only for second-level interconnects, but also for packaging assembly on first-level interconnects and for the semiconductor back-end on 2.5D and 3D memory interconnects. This book can be used as a text for college and graduate students who have the potential to become our future leaders, scientists, and engineers in the electronics and semiconductor industry.
AU  - Gan, Chong Leong.
AU  - Huang, Chen-Yu.
CN  - TK7895.M4
CY  - Cham :
DA  - 2023.
DO  - 10.1007/978-3-031-26708-6
DO  - doi
ID  - 1463709
KW  - Computer storage devices
KW  - Interconnects (Integrated circuit technology)
LK  - https://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-031-26708-6
N2  - This book explains mechanical and thermal reliability for modern memory packaging, considering materials, processes, and manufacturing. In the past 40 years, memory packaging processes have evolved enormously. This book discusses the reliability and technical challenges of first-level interconnect materials, packaging processes, advanced specialty reliability testing, and characterization of interconnects. It also examines the reliability of wire bonding, lead-free solder joints such as reliability testing and data analyses, design for reliability in hybrid packaging and HBM packaging, and failure analyses. The specialty of this book is that the materials covered are not only for second-level interconnects, but also for packaging assembly on first-level interconnects and for the semiconductor back-end on 2.5D and 3D memory interconnects. This book can be used as a text for college and graduate students who have the potential to become our future leaders, scientists, and engineers in the electronics and semiconductor industry.
PB  - Springer,
PP  - Cham :
PY  - 2023.
SN  - 9783031267086
SN  - 3031267087
T1  - Interconnect reliability in advanced memory device packaging /
TI  - Interconnect reliability in advanced memory device packaging /
UR  - https://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-031-26708-6
ER  -