Turbo decoder architecture for beyond-4G applications / Cheng-Chi Wong, Hsie-Chia Chang.
2013
TK5105.775 .W384 2013
Linked e-resources
Linked Resource
Concurrent users
Unlimited
Authorized users
Authorized users
Document Delivery Supplied
Can lend chapters, not whole ebooks
Details
Title
Turbo decoder architecture for beyond-4G applications / Cheng-Chi Wong, Hsie-Chia Chang.
Author
ISBN
9781461483106 (electronic bk.)
1461483107 (electronic bk.)
1461483093
9781461483090
9781461483090
1461483107 (electronic bk.)
1461483093
9781461483090
9781461483090
Publication Details
New York : Springer, 2013.
Language
English
Description
1 online resource (online resource (viii, 100 pages)) : illustrations
Call Number
TK5105.775 .W384 2013
Dewey Decimal Classification
621.3981
Summary
This book describes the most recent techniques for turbo decoder implementation, especially for 4G and beyond 4G applications. The authors reveal techniques for the design of high-throughput decoders for future telecommunication systems, enabling designers to reduce hardware cost and shorten processing time. Coverage includes an explanation of VLSI implementation of the turbo decoder, from basic functional units to advanced parallel architecture. The authors discuss both hardware architecture techniques and experimental results, showing the variations in area/throughput/performance with respect to several techniques.
Bibliography, etc. Note
Includes bibliographical references.
Access Note
Access limited to authorized users.
Source of Description
Description based on print version record.
Added Author
Available in Other Form
Linked Resources
Record Appears in
Table of Contents
Conventional Architecture of Turbo Decoder
Turbo Decoder with Parallel Processing
Low-Complexity Solution for Highly Parallel Architecture
High Efficiency Solution for Highly Parallel Architecture.
Turbo Decoder with Parallel Processing
Low-Complexity Solution for Highly Parallel Architecture
High Efficiency Solution for Highly Parallel Architecture.