TY  - GEN
N2  - This book focuses on the acceleration of emerging irregular sparse workloads, posed by novel artificial intelligent (AI) models and sparse linear algebra. Specifically, the book outlines several co-optimized hardware-software solutions for a highly promising class of emerging sparse AI models called Probabilistic Circuit (PC) and a similar sparse matrix workload for triangular linear systems (SpTRSV). The authors describe optimizations for the entire stack, targeting applications, compilation, hardware architecture and silicon implementation, resulting in orders of magnitude higher performance and energy-efficiency compared to the existing state-of-the-art solutions. Thus, this book provides important building blocks for the upcoming generation of edge AI platforms. Analyzes the key bottlenecks in the existing platforms for these sparse and irregular AI and linear algebra algorithms; Discusses an emerging set of AI workloads that rely on sparse matrix operations and graph-based computations; Shows how to address the execution challenges of this novel class of algorithms through hardware-software codesign.
DO  - 10.1007/978-3-031-33136-7
DO  - doi
AB  - This book focuses on the acceleration of emerging irregular sparse workloads, posed by novel artificial intelligent (AI) models and sparse linear algebra. Specifically, the book outlines several co-optimized hardware-software solutions for a highly promising class of emerging sparse AI models called Probabilistic Circuit (PC) and a similar sparse matrix workload for triangular linear systems (SpTRSV). The authors describe optimizations for the entire stack, targeting applications, compilation, hardware architecture and silicon implementation, resulting in orders of magnitude higher performance and energy-efficiency compared to the existing state-of-the-art solutions. Thus, this book provides important building blocks for the upcoming generation of edge AI platforms. Analyzes the key bottlenecks in the existing platforms for these sparse and irregular AI and linear algebra algorithms; Discusses an emerging set of AI workloads that rely on sparse matrix operations and graph-based computations; Shows how to address the execution challenges of this novel class of algorithms through hardware-software codesign.
T1  - Efficient execution of irregular dataflow graphs :hardware/software co-optimization for probabilistic AI and sparse linear algebra /
AU  - Shah, Nimish,
AU  - Meert, Wannes,
AU  - Verhelst, Marian,
CN  - TK7867
ID  - 1471875
KW  - Electronic circuits
KW  - Electronic circuit design
KW  - Embedded computer systems.
SN  - 9783031331367
SN  - 3031331362
TI  - Efficient execution of irregular dataflow graphs :hardware/software co-optimization for probabilistic AI and sparse linear algebra /
LK  - https://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-031-33136-7
UR  - https://univsouthin.idm.oclc.org/login?url=https://link.springer.com/10.1007/978-3-031-33136-7
ER  -