On-chip training NPU -- algorithm, architecture and SoC design / Donghyeon Han, Hoi-Jun Yoo.
Han, Donghyeon, author.; Yoo, Hoi-Jun, author.
2023
TK7895.E42
Available Online

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Title On-chip training NPU -- algorithm, architecture and SoC design / Donghyeon Han, Hoi-Jun Yoo.
Author Han, Donghyeon, author.
ISBN 9783031342370 (electronic bk.)
3031342372 (electronic bk.)
9783031342363
3031342364
DOI https://doi.org/10.1007/978-3-031-34237-0
Published Cham : Springer, 2023.
Language English
Description 1 online resource (xxiii, 237 pages) : illustrations (some color)
Item Number 10.1007/978-3-031-34237-0 doi
Call Number TK7895.E42
Dewey Decimal Classification 621.3815
Summary Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding. Focuses on the requirements and challenges of on-device deep neural network (DNN) training, rather than DNN inference; Provides guidelines for on-device, DNN training semiconductor or System-on-Chip (SoC) design; Includes on-device training semiconductors and SoC design examples to facilitate understanding.
Bibliography, etc. Note Includes bibliographical references and index.
Access Note Access limited to authorized users.
Source of Description Online resource; title from PDF title page (SpringerLink, viewed August 7, 2023).
Added Author Yoo, Hoi-Jun, author.
Available in Other Form On-Chip Training NPU - Algorithm, Architecture and SoC Design
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Record Appears in Online Resources > Ebooks
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Chapter 1 Introduction
Chapter 2 A Theoretical Study on Artificial Intelligence Training
Chapter 3 New Algorithm 1: Binary Direct Feedback Alignment for Fully-Connected layer
Chapter 4 New Algorithm 2: Extension of Direct Feedback Alignment to Convolutional Recurrent Neural Network
Chapter 5 DF-LNPU: A Pipelined Direct Feedback Alignment based Deep Neural Network Learning Processor for Fast Online Learning
Chapter 6 HNPU-V1: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-point and Active Bit-precision Searching
Chapter 7 HNPU-V2: An Energy-efficient DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation
Chapter 8 An Overview of Energy-efficient DNN Training Processors
Chapter 9 Conclusion.

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