Guessing random additive noise decoding : a hardware perspective / Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross.
Abbas, Syed Mohsin, author.; Jalaleddine, Marwan, author.; Gross, Warren J., author.
2023
TK7872.D37
Available Online

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Title Guessing random additive noise decoding : a hardware perspective / Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross.
Author Abbas, Syed Mohsin, author.
ISBN 9783031316630 (electronic bk.)
3031316630 (electronic bk.)
9783031316623
3031316622
DOI https://doi.org/10.1007/978-3-031-31663-0
Published Cham : Springer, 2023.
Language English
Description 1 online resource (xiv, 151 pages) : illustrations (some color)
Other Standard Identifiers 10.1007/978-3-031-31663-0 doi
Call Number TK7872.D37
Dewey Decimal Classification 621.382/2
Summary This book gives a detailed overview of a universal Maximum Likelihood (ML) decoding technique, known as Guessing Random Additive Noise Decoding (GRAND), has been introduced for short-length and high-rate linear block codes. The interest in short channel codes and the corresponding ML decoding algorithms has recently been reignited in both industry and academia due to emergence of applications with strict reliability and ultra-low latency requirements . A few of these applications include Machine-to-Machine (M2M) communication, augmented and virtual Reality, Intelligent Transportation Systems (ITS), the Internet of Things (IoTs), and Ultra-Reliable and Low Latency Communications (URLLC), which is an important use case for the 5G-NR standard. GRAND features both soft-input and hard-input variants. Moreover, there are traditional GRAND variants that can be used with any communication channel, and specialized GRAND variants that are developed for a specific communication channel. This book presents a detailed overview of these GRAND variants and their hardware architectures. The book is structured into four parts. Part 1 introduces linear block codes and the GRAND algorithm. Part 2 discusses the hardware architecture for traditional GRAND variants that can be applied to any underlying communication channel. Part 3 describes the hardware architectures for specialized GRAND variants developed for specific communication channels. Lastly, Part 4 provides an overview of recently proposed GRAND variants and their unique applications. This book is ideal for researchers or engineers looking to implement high-throughput and energy-efficient hardware for GRAND, as well as seasoned academics and graduate students interested in the topic of VLSI hardware architectures. Additionally, it can serve as reading material in graduate courses covering modern error correcting codes and Maximum Likelihood decoding for short codes.
Bibliography, etc. Note Includes bibliographical references.
Access Note Access limited to authorized users.
Source of Description Online resource; title from PDF title page (SpringerLink, viewed August 24, 2023).
Added Author Jalaleddine, Marwan, author.
Gross, Warren J., author.
Available in Other Form Print version: 9783031316623
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Record Appears in Online Resources > Ebooks
All Resources
Guessing Random Additive Noise Decoding (GRAND)
Hardware Architecture for GRAND with ABandonment (GRANDAB)
Hardware Architecture for Ordered Reliability Bits GRAND (ORBGRAND)
Hardware Architecture for List GRAND (LGRAND)
Hardware Architecture for GRAND Markov Order (GRAND-MO)
Hardware Architecture for Fading-GRAND
A survey of recent GRAND variants.

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