TY  - GEN
AB  - This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package. Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes; Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package; Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources; Helps readers to translate reliability methodology into real design flows.
AU  - Balasinski, Artur,
CN  - SpringerLink
CN  - TK7867
DO  - 10.1007/978-1-4614-1761-3
DO  - doi
ID  - 695628
KW  - Electronic circuit design.
KW  - Integrated circuits
LK  - https://univsouthin.idm.oclc.org/login?url=http://dx.doi.org/10.1007/978-1-4614-1761-3
N2  - This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package. Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes; Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package; Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources; Helps readers to translate reliability methodology into real design flows.
SN  - 9781461417613 
SN  - 1461417619 
T1  - Design for manufacturabilityfrom 1D to 4D for 90-22nm technology nodes /
TI  - Design for manufacturabilityfrom 1D to 4D for 90-22nm technology nodes /
UR  - https://univsouthin.idm.oclc.org/login?url=http://dx.doi.org/10.1007/978-1-4614-1761-3
ER  -