TY  - GEN
N2  - This book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodolgy was matured over 20 years of teaching experience in the subject. The examples in the book were planned targeting two FPGA platforms, one used widely around the world and the other one developed by a Brazilian company.
DO  - 10.1007/978-3-319-02547-6
DO  - doi
AB  - This book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodolgy was matured over 20 years of teaching experience in the subject. The examples in the book were planned targeting two FPGA platforms, one used widely around the world and the other one developed by a Brazilian company.
T1  - Synthesizable VHDL design for FPGAs
AU  - Bezerra, Eduardo Augusto,
AU  - Lettnin, Djones Vinicius,
CN  - SpringerLink
CN  - TK7885.7
ID  - 695940
KW  - VHDL (Computer hardware description language)
KW  - Field programmable gate arrays.
SN  - 9783319025476 
SN  - 3319025473 
TI  - Synthesizable VHDL design for FPGAs
LK  - https://univsouthin.idm.oclc.org/login?url=http://dx.doi.org/10.1007/978-3-319-02547-6
UR  - https://univsouthin.idm.oclc.org/login?url=http://dx.doi.org/10.1007/978-3-319-02547-6
ER  -