TY  - GEN
N2  - This book analyzes energy and reliability as major challenges faced by designers of computing frameworks in the nanometer technology regime. The authors describe the existing solutions to address these challenges and then reveal a new reconfigurable computing platform, which leverages high-density nanoscale memory for both data storage and computation to maximize the energy-efficiency and reliability. The energy and reliability benefits of this new paradigm are illustrated and the design challenges are discussed. Various hardware and software aspects of this exciting computing paradigm are described, particularly with respect to hardware-software co-designed frameworks, where the hardware unit can be reconfigured to mimic diverse application behavior. Finally, the energy-efficiency of the paradigm described is compared with other, well-known reconfigurable computing platforms. Introduces new paradigm for hardware reconfigurable frameworks, which leverages dense memory array as a malleable resource, which can be used for information storage as well as computation; Merges spatial and temporal computing to minimize interconnect overhead and achieve better scalability compared to state-of-the-art reconfigurable computing platforms; Enables efficient mapping of diverse data-intensive applications from domains of signal processing, multimedia and security applications.
DO  - 10.1007/978-1-4614-7798-3
DO  - doi
AB  - This book analyzes energy and reliability as major challenges faced by designers of computing frameworks in the nanometer technology regime. The authors describe the existing solutions to address these challenges and then reveal a new reconfigurable computing platform, which leverages high-density nanoscale memory for both data storage and computation to maximize the energy-efficiency and reliability. The energy and reliability benefits of this new paradigm are illustrated and the design challenges are discussed. Various hardware and software aspects of this exciting computing paradigm are described, particularly with respect to hardware-software co-designed frameworks, where the hardware unit can be reconfigured to mimic diverse application behavior. Finally, the energy-efficiency of the paradigm described is compared with other, well-known reconfigurable computing platforms. Introduces new paradigm for hardware reconfigurable frameworks, which leverages dense memory array as a malleable resource, which can be used for information storage as well as computation; Merges spatial and temporal computing to minimize interconnect overhead and achieve better scalability compared to state-of-the-art reconfigurable computing platforms; Enables efficient mapping of diverse data-intensive applications from domains of signal processing, multimedia and security applications.
T1  - Computing with memory for energy-efficient robust systems
AU  - Paul, Somnath,
AU  - Bhunia, Swarup,
CN  - SpringerLink
CN  - TK7885
ID  - 696744
KW  - Computer engineering.
KW  - Nanoelectromechanical systems.
KW  - Computers
SN  - 9781461477983 
SN  - 1461477980 
TI  - Computing with memory for energy-efficient robust systems
LK  - https://univsouthin.idm.oclc.org/login?url=http://dx.doi.org/10.1007/978-1-4614-7798-3
UR  - https://univsouthin.idm.oclc.org/login?url=http://dx.doi.org/10.1007/978-1-4614-7798-3
ER  -