000704628 000__ 02812cam\a2200505Ki\4500
000704628 001__ 704628
000704628 005__ 20230306135842.0
000704628 006__ m\\\\\o\\d\\\\\\\\
000704628 007__ cr\un\nnnunnun
000704628 008__ 140416s2014\\\\sz\a\\\\ob\\\\000\0\eng\d
000704628 0167_ $$a016709555$$2Uk
000704628 020__ $$a9783319060712 $$qelectronic book
000704628 020__ $$a3319060716 $$qelectronic book
000704628 020__ $$z9783319060705
000704628 0247_ $$a10.1007/978-3-319-06071-2$$2doi
000704628 035__ $$aSP(OCoLC)ocn876830122
000704628 035__ $$aSP(OCoLC)876830122
000704628 040__ $$aGW5XE$$beng$$erda$$epn$$cGW5XE$$dIDEBK$$dUKMGB$$dCOO
000704628 049__ $$aISEA
000704628 050_4 $$aTK6680.5
000704628 08204 $$a006.6/96$$223
000704628 1001_ $$aElarabi, Tarek A.,$$eauthor.
000704628 24510 $$aReal-time heterogeneous video transcoding for low-power applications /$$cTarek A. Elarabi, Ahmed Abdelgawad, Magdy Bayoumi.
000704628 264_1 $$aCham :$$bSpringer,$$c2014.
000704628 264_4 $$c©2014
000704628 300__ $$a1 online resource (xii, 84 pages) :$$billustrations.
000704628 336__ $$atext$$btxt$$2rdacontent
000704628 337__ $$acomputer$$bc$$2rdamedia
000704628 338__ $$aonline resource$$bcr$$2rdacarrier
000704628 504__ $$aIncludes bibliographical references.
000704628 506__ $$aAccess limited to authorized users.
000704628 520__ $$aThis book introduces a novel transcoding algorithm for real time video applications, designed to overcome inter-operability problems between MPEG-2 to H.264/AVC. The new algorithm achieves 92.8% reduction in the transcoding run time at a price of an acceptable Peak Signal-to-Noise Ratio (PSNR) degradation, enabling readers to use it for real time video applications. The algorithm described is evaluated through simulation and experimental results. In addition, the authors present a hardware implementation of the new algorithm using Field Programmable Gate Array (FPGA) and Application-specific standard products (ASIC). Describes a novel transcoding algorithm for real time video applications, designed to overcome inter-operability problems between H.264/AVC to MPEG-2; Implements algorithm presented using Field Programmable Gate Array (FPGA) and Application-specific Integrated Circuit (ASIC); Demonstrates the solution to real problems, with verification through simulation and experimental results.
000704628 588__ $$aDescription based on online resource; title from PDF title page (SpringerLink, viewed Apr. 16, 2014).
000704628 650_0 $$aDigital video$$xStandards.
000704628 650_0 $$aDigital video$$xData processing.
000704628 650_0 $$aVideo compression$$xData processing.
000704628 650_0 $$aCoding theory.
000704628 650_0 $$aAlgorithms.
000704628 650_0 $$aMPEG (Video coding standard)
000704628 7001_ $$aAbdelgawad, Ahmed,$$eauthor.
000704628 7001_ $$aBayoumi, Magdy A.,$$eauthor.
000704628 85280 $$bebk$$hSpringerLink
000704628 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://dx.doi.org/10.1007/978-3-319-06071-2$$zOnline Access
000704628 909CO $$ooai:library.usi.edu:704628$$pGLOBAL_SET
000704628 980__ $$aEBOOK
000704628 980__ $$aBIB
000704628 982__ $$aEbook
000704628 983__ $$aOnline
000704628 994__ $$a92$$bISE