000717108 000__ 03189cam\a2200457Ii\4500
000717108 001__ 717108
000717108 005__ 20230306140154.0
000717108 006__ m\\\\\o\\d\\\\\\\\
000717108 007__ cr\cn\nnnunnun
000717108 008__ 141112t20142014gw\\\\\\ob\\\\000\0\eng\d
000717108 020__ $$a9783658080471$$qelectronic book
000717108 020__ $$a3658080477$$qelectronic book
000717108 020__ $$z9783658080464
000717108 020__ $$z3658080469
000717108 0247_ $$a10.1007/978-3-658-08047-1$$2doi
000717108 035__ $$aSP(OCoLC)ocn895047548
000717108 035__ $$a717108
000717108 040__ $$aN$T$$beng$$erda$$epn$$cN$T$$dN$T$$dGW5XE$$dYDXCP$$dOCLCQ$$dUPM$$dCOO
000717108 049__ $$aISEA
000717108 050_4 $$aTK7895.E42$$bM85 2014eb
000717108 08204 $$a621.395$$223
000717108 1001_ $$aBiedermann, A.$$q(Alexander)
000717108 24510 $$aDesign concepts for a virtualizable embedded MPSoC architecture$$h[electronic resource] :$$benabling virtualization in embedded multi-processor systems /$$cAlexander Biedermann.
000717108 2463_ $$aDesign concepts for a virtualizable embedded Multiprocessor systems-on-chips architecture
000717108 264_1 $$aWiesbaden [Germany] :$$bSpringer Vieweg,$$c[2014]
000717108 264_4 $$c©2014
000717108 300__ $$a1 online resource.
000717108 336__ $$atext$$btxt$$2rdacontent
000717108 337__ $$acomputer$$bc$$2rdamedia
000717108 338__ $$aonline resource$$bcr$$2rdacarrier
000717108 504__ $$aIncludes bibliographical references.
000717108 506__ $$aAccess limited to authorized users.
000717108 520__ $$aAlexander Biedermann presents a generic hardware-based virtualization approach, which may transform an array of any off-the-shelf embedded processors into a multi-processor system with high execution dynamism. Based on this approach, he highlights concepts for the design of energy aware systems, self-healing systems as well as parallelized systems. For the latter, the novel so-called Agile Processing scheme is introduced by the author, which enables a seamless transition between sequential and parallel execution schemes. The design of such virtualizable systems is further aided by introduction of a dedicated design framework, which integrates into existing, commercial workflows. As a result, this book provides comprehensive design flows for the design of embedded multi-processor systems-on-chip. Contents Virtualization for Embedded Processors Generic Virtualization Layer for Multi-Processor Systems-on-Chip Design Flow for Self-Healing Systems Design Flow for Agile Processing Systems Target Groups Scientists and students in the field of embedded systems, especially reconfigurable systems Engineers in the field of embedded HW/SW systems, such as in the automotive domain About the Author Alexander Biedermann completed his doctoral thesis at the Integrated Circuits and Systems Lab, Technische Universität Darmstadt, and at the Center for Advanced Security Research Darmstadt (CASED) under supervision of Prof. Dr.-Ing. Sorin A. Huss.
000717108 588__ $$aOnline resource; title from PDF title page (viewed November 13, 2014).
000717108 650_0 $$aSystems on a chip$$xDesign and construction.
000717108 650_0 $$aMultiprocessors.
000717108 77608 $$iPrint version:$$z9783658080464
000717108 85280 $$bebk$$hSpringerLink
000717108 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://dx.doi.org/10.1007/978-3-658-08047-1$$zOnline Access
000717108 909CO $$ooai:library.usi.edu:717108$$pGLOBAL_SET
000717108 980__ $$aEBOOK
000717108 980__ $$aBIB
000717108 982__ $$aEbook
000717108 983__ $$aOnline
000717108 994__ $$a92$$bISE