Reliability of high mobility SiGe channel MOSFETs for future CMOS applications [electronic resource] / Jacopo Franco, Ben Kaczer, Guido Groeseneken.
2014
TK7871.95
Linked e-resources
Linked Resource
Online Access
Concurrent users
Unlimited
Authorized users
Authorized users
Document Delivery Supplied
Can lend chapters, not whole ebooks
Details
Title
Reliability of high mobility SiGe channel MOSFETs for future CMOS applications [electronic resource] / Jacopo Franco, Ben Kaczer, Guido Groeseneken.
Author
Franco, Jacopo, author.
ISBN
9789400776630 electronic book
9400776632 electronic book
9789400776623
9400776632 electronic book
9789400776623
Published
Dordrecht : Springer, 2014.
Language
English
Description
1 online resource (xix, 187 pages) : illustrations.
Item Number
10.1007/978-94-007-7663-0 doi
Call Number
TK7871.95
Dewey Decimal Classification
621.3815284
Summary
Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several groups have already demonstrated functional Si channel devices with aggressively scaled Equivalent Oxide Thickness (EOT) down to 5, a 10 year reliable device operation cannot be guaranteed anymore due to severe Negative Bias Temperature Instability. This book focuses on the reliability of the novel (Si)Ge channel quantum well pMOSFET technology. This technology is being considered for possible implementation in next CMOS technology nodes, thanks to its benefit in terms of carrier mobility and device threshold voltage tuning. We observe that it also opens a degree of freedom for device reliability optimization. By properly tuning the device gate stack, sufficiently reliable ultra-thin EOT devices with a 10 years lifetime at operating conditions are demonstrated. The extensive experimental datasets collected on a variety of processed 300mm wafers and presented here show the reliability improvement to be process- and architecture-independent and, as such, readily transferable to advanced device architectures as Tri-Gate (finFET) devices. We propose a physical model to understand the intrinsically superior reliability of the MOS system consisting of a Ge-based channel and a SiO2/HfO2 dielectric stack. The improved reliability properties here discussed strongly support (Si)Ge technology as a clear frontrunner for future CMOS technology nodes.
Bibliography, etc. Note
Includes bibliographical references.
Access Note
Access limited to authorized users.
Source of Description
Description based on online resource; title from PDF title page (SpringerLink, viewed October 21, 2013).
Added Author
Kaczer, Ben, author.
Groeseneken, Guido, author.
Groeseneken, Guido, author.
Series
Springer series in advanced microelectronics ; v.47.
Linked Resources
Online Access
Record Appears in
Online Resources > Ebooks
All Resources
All Resources
Table of Contents
Degradation mechanisms
Techniques and devices
Negative Bias Temperature Instability in (Si)Ge pMOSFETs
Negative Bias Temperature Instability in nanoscale devices
Channel Hot Carriers and other reliability mechanisms
Conclusions and perspectives.
Techniques and devices
Negative Bias Temperature Instability in (Si)Ge pMOSFETs
Negative Bias Temperature Instability in nanoscale devices
Channel Hot Carriers and other reliability mechanisms
Conclusions and perspectives.