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Foreword; Preface; Acknowledgements; Contents; List of Abbreviations; Chapter 1 An Introduction to Timing Attacks; 1.1 Side-Channel Attacks; 1.1.1 Side-Channel Attack Requirements; 1.1.2 The Attacker's Success; 1.1.3 Side-Channel Attack Suppression; 1.2 Timing Attacks; 1.2.1 Kocher's Timing Attack; 1.2.2 Taxonomy of Timing Attacks; 1.3 Organization; Reference; Chapter 2 Modern Cryptography; 2.1 Types of Encryption Algorithms; 2.2 Block Ciphers: An Important Family of Symmetric-Key Ciphers; 2.2.1 AES; 2.2.1.1 Software Implementations of AES; 2.2.2 CLEFIA
2.2.2.1 T-Table Implementation of CLEFIA2.2.3 CAMELLIA; 2.3 Classical Cryptanalysis; 2.3.1 Classical Cryptanalysis of Block Ciphers; 2.3.2 The Idea of Differential in Block Ciphers; 2.4 Asymmetric-Key Ciphers; 2.5 RSA: An Asymmetric-Key Algorithm; 2.5.1 Square and Multiply Algorithm to Perform Exponentiation; 2.6 Confinement Problem and Covert Channels; 2.7 Formal Analysis of Side-Channel Attacks; 2.8 Conclusion; References; Chapter 3 Superscalar Processors, Cache Memories, and Branch Predictors; 3.1 Superscalar Processors; 3.2 Memory Hierarchy and Cache Memory
3.2.1 Organization of Cache Memory3.2.2 Improving Cache Performance for Superscalar Processors; 3.3 Branch Prediction Unit; 3.3.1 Static Branch Prediction; 3.3.2 Dynamic Branch Prediction Schemes; 3.3.2.1 1-bit Branch predictor; 3.3.2.2 Bimodal Predictor; 3.3.2.3 Two-Level Adaptive Predictor; 3.3.3 Branch Target Buffers; 3.4 Conclusion; Reference; Chapter 4 Time-Driven Cache Attacks; 4.1 A Simple Illustration; 4.1.1 Relation Between Size and Bits Revealed; 4.1.2 Relation Between Alignment of Tables and Bits Revealed; 4.1.3 Initial State of Cache Memory; 4.2 Collisions from Execution Time
4.2.1 Clocks Using Hardware Time Stamp Counters4.2.2 Clocks with Virtual Time-Stamp Counters; 4.2.3 Distinguishing Cache Hit and Miss Events Using Time; 4.3 Timing Attacks on Block Ciphers Based on Internal Collisions; 4.3.1 Max, Min, or Max Deviation; 4.4 Time-Driven Attack Based on Induced Cache Miss; 4.5 Results; 4.6 Conclusion; Reference; Chapter 5 Advanced Time-Driven Cache Attacks on Block Ciphers; 5.1 Second Round Attack on AES; 5.2 Differential Cache Attacks on Feistel Ciphers; 5.3 Differential Cache Attack on CLEFIA; 5.3.1 Differential Properties of CLEFIA's F Functions
5.3.2 Determining RK0 and RK15.3.3 Determining WK0 ⊕ RK2 and WK1 ⊕ RK3; 5.3.4 Determining RK4 and RK5; 5.3.5 Determining RK2 and RK3; 5.4 Conclusion; References; Chapter 6 A Formal Analysis of Time-Driven Cache Attacks ; 6.1 Memory Access Model for a Block Cipher; 6.2 Cache Misses in a Block Cipher; 6.3 Average Execution Time of a Block Cipher; 6.3.1 Estimating the Difference of Means; 6.4 DOM as a Security Metric; 6.5 Application of the Model; 6.5.1 Comparing Cipher Implementations; 6.5.2 Choosing the Right Implementation; 6.6 Conclusion
2.2.2.1 T-Table Implementation of CLEFIA2.2.3 CAMELLIA; 2.3 Classical Cryptanalysis; 2.3.1 Classical Cryptanalysis of Block Ciphers; 2.3.2 The Idea of Differential in Block Ciphers; 2.4 Asymmetric-Key Ciphers; 2.5 RSA: An Asymmetric-Key Algorithm; 2.5.1 Square and Multiply Algorithm to Perform Exponentiation; 2.6 Confinement Problem and Covert Channels; 2.7 Formal Analysis of Side-Channel Attacks; 2.8 Conclusion; References; Chapter 3 Superscalar Processors, Cache Memories, and Branch Predictors; 3.1 Superscalar Processors; 3.2 Memory Hierarchy and Cache Memory
3.2.1 Organization of Cache Memory3.2.2 Improving Cache Performance for Superscalar Processors; 3.3 Branch Prediction Unit; 3.3.1 Static Branch Prediction; 3.3.2 Dynamic Branch Prediction Schemes; 3.3.2.1 1-bit Branch predictor; 3.3.2.2 Bimodal Predictor; 3.3.2.3 Two-Level Adaptive Predictor; 3.3.3 Branch Target Buffers; 3.4 Conclusion; Reference; Chapter 4 Time-Driven Cache Attacks; 4.1 A Simple Illustration; 4.1.1 Relation Between Size and Bits Revealed; 4.1.2 Relation Between Alignment of Tables and Bits Revealed; 4.1.3 Initial State of Cache Memory; 4.2 Collisions from Execution Time
4.2.1 Clocks Using Hardware Time Stamp Counters4.2.2 Clocks with Virtual Time-Stamp Counters; 4.2.3 Distinguishing Cache Hit and Miss Events Using Time; 4.3 Timing Attacks on Block Ciphers Based on Internal Collisions; 4.3.1 Max, Min, or Max Deviation; 4.4 Time-Driven Attack Based on Induced Cache Miss; 4.5 Results; 4.6 Conclusion; Reference; Chapter 5 Advanced Time-Driven Cache Attacks on Block Ciphers; 5.1 Second Round Attack on AES; 5.2 Differential Cache Attacks on Feistel Ciphers; 5.3 Differential Cache Attack on CLEFIA; 5.3.1 Differential Properties of CLEFIA's F Functions
5.3.2 Determining RK0 and RK15.3.3 Determining WK0 ⊕ RK2 and WK1 ⊕ RK3; 5.3.4 Determining RK4 and RK5; 5.3.5 Determining RK2 and RK3; 5.4 Conclusion; References; Chapter 6 A Formal Analysis of Time-Driven Cache Attacks ; 6.1 Memory Access Model for a Block Cipher; 6.2 Cache Misses in a Block Cipher; 6.3 Average Execution Time of a Block Cipher; 6.3.1 Estimating the Difference of Means; 6.4 DOM as a Security Metric; 6.5 Application of the Model; 6.5.1 Comparing Cipher Implementations; 6.5.2 Choosing the Right Implementation; 6.6 Conclusion