000727346 000__ 03332cam\a2200445Ii\4500
000727346 001__ 727346
000727346 005__ 20230306140813.0
000727346 006__ m\\\\\o\\d\\\\\\\\
000727346 007__ cr\cn\nnnunnun
000727346 008__ 150528s2015\\\\sz\a\\\\ob\\\\000\0\eng\d
000727346 019__ $$a910706802
000727346 020__ $$a9783319179247$$qelectronic book
000727346 020__ $$a3319179241$$qelectronic book
000727346 020__ $$z9783319179230
000727346 0247_ $$a10.1007/978-3-319-17924-7$$2doi
000727346 035__ $$aSP(OCoLC)ocn910238379
000727346 035__ $$aSP(OCoLC)910238379$$z(OCoLC)910706802
000727346 040__ $$aGW5XE$$beng$$erda$$epn$$cGW5XE$$dYDXCP$$dIDEBK$$dE7B$$dCOO$$dEBLCP$$dDEBSZ
000727346 049__ $$aISEA
000727346 050_4 $$aTK7895.G36
000727346 08204 $$a621.39/5$$223
000727346 1001_ $$aSimpson, Philip Andrew,$$eauthor.
000727346 24510 $$aFPGA design$$h[electronic resource] :$$bbest practices for team-based reuse /$$cPhilip Andrew Simpson.
000727346 250__ $$aSecond edition.
000727346 264_1 $$aCham :$$bSpringer,$$c2015.
000727346 300__ $$a1 online resource (xi, 257 pages) :$$billustrations.
000727346 336__ $$atext$$btxt$$2rdacontent
000727346 337__ $$acomputer$$bc$$2rdamedia
000727346 338__ $$aonline resource$$bcr$$2rdacarrier
000727346 504__ $$aIncludes bibliographical references.
000727346 5050_ $$aIntroduction -- Project Management -- Design Specification -- System Modeling -- Resource Scoping -- Design Environment -- Board Design -- Power and Thermal analysis -- Team Based Design -- RTL Design -- IP reuse -- Embedded Design -- Functional verification -- Timing Closure -- High level Design -- In System Debug -- Design Sign-off.
000727346 506__ $$aAccess limited to authorized users.
000727346 520__ $$aThis book describes best practices for successful FPGA design. It is the result of the author?s meetings with hundreds of customers on the challenges facing each of their FPGA design teams. By gaining an understanding into their design environments, processes, what works and what does not work, key areas of concern in implementing system designs have been identified and a recommended design methodology to overcome these challenges has been developed. This book?s content has a strong focus on design teams that are spread across sites. The goal being to increase the productivity of FPGA design teams by establishing a common methodology across design teams; enabling the exchange of design blocks across teams. Coverage includes the complete FPGA design flow, from the basics to advanced techniques. This new edition has been enhanced to include new sections on System modeling, embedded design and high level design. The original sections on Design Environment, RTL design and timing closure have all been expanded to include more up to date techniques as well as providing more extensive scripts and RTL code that can be reused by readers. Presents complete, field-tested methodology for FPGA design, focused on reuse across design teams; Offers best practices for FPGA timing closure, in-system debug, and board design; Details techniques to resolve common pitfalls in designing with FPGAs.
000727346 588__ $$aOnline resource; title from PDF title page (SpringerLink, viewed May 28, 2015).
000727346 650_0 $$aField programmable gate arrays$$xDesign.
000727346 77608 $$iPrint version:$$z9783319179230
000727346 852__ $$bebk
000727346 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-17924-7$$zOnline Access$$91397441.1
000727346 909CO $$ooai:library.usi.edu:727346$$pGLOBAL_SET
000727346 980__ $$aEBOOK
000727346 980__ $$aBIB
000727346 982__ $$aEbook
000727346 983__ $$aOnline
000727346 994__ $$a92$$bISE