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000752509 019__ $$a930040981
000752509 020__ $$a9783319233895$$q(electronic book)
000752509 020__ $$a3319233890$$q(electronic book)
000752509 020__ $$z9783319233888
000752509 020__ $$z3319233882
000752509 0247_ $$a10.1007/978-3-319-23389-5$$2doi
000752509 035__ $$aSP(OCoLC)ocn929624638
000752509 035__ $$aSP(OCoLC)929624638$$z(OCoLC)930040981
000752509 040__ $$aN$T$$beng$$erda$$epn$$cN$T$$dIDEBK$$dN$T$$dYDXCP$$dOCLCF$$dNUI$$dAZU$$dCOO$$dCDX$$dGW5XE
000752509 049__ $$aISEA
000752509 050_4 $$aTK7876
000752509 08204 $$a621.381/32$$223
000752509 24500 $$aNear threshold computing$$h[electronic resource] :$$btechnology, methods and applications /$$cMichael Hübner, Cristina Silvano, editors.
000752509 264_1 $$aCham :$$bSpringer,$$c2016.
000752509 300__ $$a1 online resource.
000752509 336__ $$atext$$btxt$$2rdacontent
000752509 337__ $$acomputer$$bc$$2rdamedia
000752509 338__ $$aonline resource$$bcr$$2rdacarrier
000752509 504__ $$aIncludes bibliographical references.
000752509 5050_ $$aPART I: NTC opportunities, challenges and limits -- Chapter 1: Extreme Energy Efficiency by Near Threshold Voltage Operation -- Part II Micro-architecture challenges and energy management at NTC -- Chapter2: Many-core Architecture for NTC: Energy Efficiency from the Ground Up -- Chapter 3: Variability-Aware Voltage Island Management for Near-Threshold Voltage Computing With Performance Guarantees -- Part III Memory system design for NTC -- Chapter4: Resizable Data Composer (RDC) Cache: A Near-Threshold Cache tolerating Process Variation Via architectural fault tolerance -- Chapter 5 Memories for NTC.
000752509 506__ $$aAccess limited to authorized users.
000752509 520__ $$aThis book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips. · Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall; · Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point; · Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes.
000752509 588__ $$aOnline resource; title from PDF title page (viewed November 24, 2015).
000752509 650_0 $$aMicrowave circuits$$xDesign and construction.
000752509 650_0 $$aElectronic circuit design.
000752509 650_0 $$aModulation (Electronics)
000752509 7001_ $$aHübner, Michael,$$eeditor.
000752509 7001_ $$aSilvano, Cristina,$$eeditor.
000752509 77608 $$iPrint version:$$z3319233882$$z9783319233888$$w(OCoLC)915119934
000752509 852__ $$bebk
000752509 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-23389-5$$zOnline Access$$91397441.1
000752509 909CO $$ooai:library.usi.edu:752509$$pGLOBAL_SET
000752509 980__ $$aEBOOK
000752509 980__ $$aBIB
000752509 982__ $$aEbook
000752509 983__ $$aOnline
000752509 994__ $$a92$$bISE