000753446 000__ 03405cam\a2200469Ii\4500 000753446 001__ 753446 000753446 005__ 20230306141558.0 000753446 006__ m\\\\\o\\d\\\\\\\\ 000753446 007__ cr\cn\nnnunnun 000753446 008__ 160126s2016\\\\sz\a\\\\ob\\\\000\0\eng\d 000753446 019__ $$a936083700 000753446 020__ $$a9783319240046$$q(electronic book) 000753446 020__ $$a3319240048$$q(electronic book) 000753446 020__ $$z9783319240022 000753446 020__ $$z3319240021 000753446 0247_ $$a10.1007/978-3-319-24004-6$$2doi 000753446 035__ $$aSP(OCoLC)ocn936040151 000753446 035__ $$aSP(OCoLC)936040151$$z(OCoLC)936083700 000753446 040__ $$aN$T$$beng$$erda$$epn$$cN$T$$dGW5XE$$dN$T$$dIDEBK$$dEBLCP$$dCDX$$dYDXCP$$dAZU$$dCOO$$dOCLCF$$dTJC 000753446 049__ $$aISEA 000753446 050_4 $$aQA76.9.A3 000753446 08204 $$a004.6$$223 000753446 1001_ $$aZhang, Chenxin,$$eauthor. 000753446 24510 $$aHeterogeneous reconfigurable processors for real-time baseband processing$$h[electronic resource] :$$bfrom algorithm to architecture /$$cChenxin Zhang, Liang Liu, Viktor Öwall. 000753446 264_1 $$aCham :$$bSpringer,$$c2016. 000753446 300__ $$a1 online resource (xiv, 195 pages) :$$billustrations. 000753446 336__ $$atext$$btxt$$2rdacontent 000753446 337__ $$acomputer$$bc$$2rdamedia 000753446 338__ $$aonline resource$$bcr$$2rdacarrier 000753446 504__ $$aIncludes bibliographical references. 000753446 5050_ $$aIntroduction -- Digital Hardware Platforms -- Digital Baseband Processing -- The Reconfigurable Cell Array -- Multi-standard Digital Front-End Processing -- Multi-task MIMO Signal Processing -- Future Multi-user MIMO systems -- A Discussion -- Conclusion.-. 000753446 506__ $$aAccess limited to authorized users. 000753446 520__ $$aThis book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G. ?Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration; ?Describes a unique design and optimization methodology, applied to different areas and levels, including communication theory, hardware implementation, and software support; ?Demonstrates design trade-offs during different development phases and enables readers to apply similar techniques to various applications. 000753446 588__ $$aOnline resource; title from PDF title page (SpringerLink, viewed January 27, 2016). 000753446 650_0 $$aAdaptive computing systems. 000753446 7001_ $$aLiu, Liang$$c(Electrical engineer),$$eauthor. 000753446 7001_ $$aÖwall, Viktor,$$eauthor. 000753446 77608 $$iPrint version:$$z3319240021$$z9783319240022$$w(OCoLC)918931653 000753446 852__ $$bebk 000753446 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-24004-6$$zOnline Access$$91397441.1 000753446 909CO $$ooai:library.usi.edu:753446$$pGLOBAL_SET 000753446 980__ $$aEBOOK 000753446 980__ $$aBIB 000753446 982__ $$aEbook 000753446 983__ $$aOnline 000753446 994__ $$a92$$bISE