000754682 000__ 03420cam\a2200481Ii\4500 000754682 001__ 754682 000754682 005__ 20230306141721.0 000754682 006__ m\\\\\o\\d\\\\\\\\ 000754682 007__ cr\cn\nnnunnun 000754682 008__ 160411s2016\\\\si\a\\\\ob\\\\000\0\eng\d 000754682 020__ $$a9789811008009$$q(electronic book) 000754682 020__ $$a9811008000$$q(electronic book) 000754682 020__ $$z9789811007996 000754682 0247_ $$a10.1007/978-981-10-0800-9$$2doi 000754682 035__ $$aSP(OCoLC)ocn946357991 000754682 035__ $$aSP(OCoLC)946357991 000754682 040__ $$aN$T$$beng$$erda$$epn$$cN$T$$dYDXCP$$dGW5XE$$dIDEBK$$dOCLCQ$$dEBLCP$$dN$T$$dAZU$$dCDX$$dCOO$$dOHI 000754682 049__ $$aISEA 000754682 050_4 $$aTK5981 000754682 08204 $$a621.382/24$$223 000754682 1001_ $$aKaushik, Brajesh Kumar,$$eauthor. 000754682 24510 $$aCrosstalk in modern on-chip interconnects$$h[electronic resource] :$$ba FDTD approach /$$cB.K. Kaushik, V. Ramesh Kumar, Amalendu Patnaik. 000754682 264_1 $$aSingapore :$$bSpringer,$$c2016. 000754682 300__ $$a1 online resource (xv, 116 pages) :$$billustrations. 000754682 336__ $$atext$$btxt$$2rdacontent 000754682 337__ $$acomputer$$bc$$2rdamedia 000754682 338__ $$aonline resource$$bcr$$2rdacarrier 000754682 4901_ $$aSpringerBriefs in applied sciences and technology,$$x2191-530X 000754682 504__ $$aIncludes bibliographical references. 000754682 5050_ $$aIntroduction to On-chip Interconnects and Modeling -- Interconnect Modeling, CNT and GNR Structure, Properties and Characteristics -- FDTD Model for Crosstalk Analysis of CMOS Gate-Driven Coupled Copper Interconnects -- FDTD Model for Crosstalk Analysis of Multiwall Carbon Nanotube (MWCNT) Interconnects -- Crosstalk Modeling with Width Dependent MFP in MLGNR Interconnects Using FDTD Technique -- An Efficient US-FDTD Model for Crosstalk Analysis of On-chip Interconnects. 000754682 506__ $$aAccess limited to authorized users. 000754682 520__ $$aThe book provides accurate FDTD models for on-chip interconnects, covering most recent advancements in materials and design. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for CNT and GNR based interconnects are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR-based interconnects are also discussed in the book. The proposed models are validated with the HSPICE simulations. The book introduces the current research scenario in the modeling of on-chip interconnects. It presents the structure, properties, and characteristics of graphene based on-chip interconnects and the FDTD modeling of Cu based on-chip interconnects. The model considers the non-linear effects of CMOS driver as well as the transmission line effects of interconnect line that includes coupling capacitance and mutual inductance effects. In a more realistic manner, the proposed model includes the effect of width-dependent MFP of the MLGNR while taking into account the edge roughness. 000754682 588__ $$aOnline resource; title from PDF title page (SpringerLink, viewed April 11, 2016). 000754682 650_0 $$aCrosstalk$$xMathematical models. 000754682 650_0 $$aInterconnects (Integrated circuit technology) 000754682 7001_ $$aKumar, V. Ramesh,$$eauthor. 000754682 7001_ $$aPatnaik, Amalendu,$$eauthor. 000754682 77608 $$iPrint version:$$z9789811007996 000754682 830_0 $$aSpringerBriefs in applied sciences and technology. 000754682 852__ $$bebk 000754682 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-981-10-0800-9$$zOnline Access$$91397441.1 000754682 909CO $$ooai:library.usi.edu:754682$$pGLOBAL_SET 000754682 980__ $$aEBOOK 000754682 980__ $$aBIB 000754682 982__ $$aEbook 000754682 983__ $$aOnline 000754682 994__ $$a92$$bISE