Memory controllers for mixed-time-criticality systems [electronic resource] : architectures, methodologies and trade-offs / Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens.

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Memory controllers for mixed-time-criticality systems [electronic resource] : architectures, methodologies and trade-offs / Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens.

9783319320946 (electronic book)
3319320947 (electronic book)
9783319320939

Switzerland : Springer, [2016]

English

1 online resource (xxvii, 202 pages)

10.1007/978-3-319-32094-6 doi

TK7895.E42

006.2/2

This book discusses the design and performance analysis of SDRAM controllers that cater to both real-time and best-effort applications, i.e. mixed-time-criticality memory controllers. The authors describe the state of the art, and then focus on an architecture template for reconfigurable memory controllers that addresses effectively the quickly evolving set of SDRAM standards, in terms of worst-case timing and power analysis, as well as implementation. A prototype implementation of the controller in SystemC and synthesizable VHDL for an FPGA development board are used as a proof of concept of the architecture template.

Includes bibliographical references.

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Online resource; title from PDF title page (viewed April 19, 2016).

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Print version: 9783319320939

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