Essential knowledge for transistor-level LSI circuit design [electronic resource] / Toru Nakura ; translated by Yuta Toriyama.
Nakura, Tōru, author.
2016
TK7874
Available Online

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Title Essential knowledge for transistor-level LSI circuit design [electronic resource] / Toru Nakura ; translated by Yuta Toriyama.
Author Nakura, Tōru, author.
Uniform Title LSI sekkei jōshiki kōza. English
ISBN 9789811004247 (electronic book)
9811004242 (electronic book)
9789811004230
Published Singapore : Springer, [2016]
Language English
Description 1 online resource (xi, 211 pages) : color illustrations
Call Number TK7874
Dewey Decimal Classification 621.3815
Summary This book is a collection of the miscellaneous knowledge essential for transistor-level LSI circuit design, summarized as the issues that need to be considered in each design step. To design an LSI that actually functions and to be able to properly measure it, an extremely large amount of diverse, detailed knowledge is necessary. Even though one may read a textbook about an op-amp, for example, the op-amp circuit design may not actually be possible to complete in one’s CAD tools. The first half of this text explains important design issues such as the operating principles of CAD tools, including schematic entry, SPICE simulation, layout and verification, and RC extraction. Then, mistake-prone topics for many circuit design beginners, resulting from their lack of consideration of these subjects, are explained including IO buffers, noise, and problems due to the progress of miniaturization. Following these topics, basic but very specialized issues for LSI circuit measurement are explained including measurement devices and measurement techniques. Readers will have the simulated experience of the whole flow from top to bottom of circuit design and measurement. The book will be useful for newcomers to a lab or to new graduates who are assigned to a circuit design group but have little experience in circuit design. This published work is also ideal for those who have some experience in circuit design, to confirm and complement the knowledge that they already possess.
Note Includes index.
Access Note Access limited to authorized users.
Source of Description Online resource; title from PDF title page (viewed May 16, 2016).
Translation of Eruesuai sekkei jōshiki kōza.
Available in Other Form Essential knowledge for transistor-level LSI circuit design.
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Schematic Entry
SPICE Simulation
Layout and Verification
Interconnect RC Extraction
IO Buffers
Noise
Problems due to the Progress of Miniaturization
Measurement Devices
Measurement Techniques We
The Overall Design Procedure.

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