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000755428 020__ $$a9788132227915$$q(electronic book)
000755428 020__ $$a8132227913$$q(electronic book)
000755428 020__ $$z9788132227892
000755428 035__ $$aSP(OCoLC)ocn949930423
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000755428 049__ $$aISEA
000755428 050_4 $$aTK7868.L6
000755428 08204 $$a621.39/5$$223
000755428 1001_ $$aTaraate, Vaibbhav,$$eauthor.
000755428 24510 $$aDigital logic design using Verilog$$h[electronic resource] :$$bcoding and RTL synthesis /$$cVaibbhav Taraate.
000755428 264_1 $$aIndia :$$bSpringer,$$c2016.
000755428 300__ $$a1 online resource (xix, 402 pages) :$$billustrations.
000755428 336__ $$atext$$btxt$$2rdacontent
000755428 337__ $$acomputer$$bc$$2rdamedia
000755428 338__ $$aonline resource$$bcr$$2rdacarrier
000755428 504__ $$aIncludes bibliographical references and index.
000755428 5050_ $$aIntroduction -- Combinational Logic Design (Part I) -- Combinational Logic Design (Part II) -- Combinational Design Guidelines -- Sequential Logic Design -- Sequential Design Guidelines -- Complex Designs using Verilog RTL -- Finite State Machines -- Simulation Concepts and PLD Based Designs -- RTL Synthesis -- Static Timing Analysis (STA) -- Constraining Design -- Multiple Clock Domain Designs -- Low Power Design -- RTL Design for SOCs.
000755428 506__ $$aAccess limited to authorized users.
000755428 520__ $$aThis book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex. The book constructs the logic design story from the fundamentals of logic design to advanced RTL design concepts. Keeping in view the importance of miniaturization today, the book gives practical information on the issues with ASIC RTL design and how to overcome these concerns. It clearly explains how to write an efficient RTL code and how to improve design performance. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design. The practical orientation of the book makes it ideal for training programs for practicing design engineers and for short-term vocational programs. The contents of the book will also make it a useful read for students and hobbyists. .
000755428 588__ $$aOnline resource; title from PDF title page (SpringerLink, viewed May 31, 2016).
000755428 650_0 $$aLogic design$$xData processing.
000755428 650_0 $$aVerilog (Computer hardware description language)
000755428 77608 $$iPrint version:$$aTaraate, Vaibbhav.$$tDigital logic design using Verilog : coding and RTL synthesis.$$d[New Delhi], India : Springer, c2016$$z9788132227892$$w(DLC)  2016936278
000755428 852__ $$bebk
000755428 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-81-322-2791-5$$zOnline Access$$91397441.1
000755428 909CO $$ooai:library.usi.edu:755428$$pGLOBAL_SET
000755428 980__ $$aEBOOK
000755428 980__ $$aBIB
000755428 982__ $$aEbook
000755428 983__ $$aOnline
000755428 994__ $$a92$$bISE