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1 Introduction: Barriers Preventing CMOS Device Technology from Moving Forward; 1.1 Introduction; 1.2 Overview of the Metal Oxide Semiconductor Field Effect Transistor (MOSFET); 1.2.1 Energy Crisis in MOSFET; 1.2.2 Thin Body MOSFETs Allow CMOS Technology to Move Forward Aggressively; 1.2.3 A New Class of Switch Enables CMOS Technology to Move Forward; 1.3 Process-Induced Variation; 1.3.1 Process-Induced Systematic Variation; 1.3.2 Process-Induced Random Variation; References; Understanding of Process-Induced Random Variation; 2 Line Edge Roughness (LER); 2.1 Introduction
2.2 Physical Origin of Line Edge Roughness2.2.1 LER of Mask Patterns; 2.2.2 Variations in the Dose of Light Exposure; 2.2.3 LER Generation in Chemically Amplified (CA) Resists; 2.2.4 Intrinsic Roughness of the Resist; 2.3 Characterization of Line Edge Roughness; 2.3.1 Line Edge Roughness (LER); 2.3.2 Line Width Roughness (LWR); 2.4 Impact of Double Patterning on Line Edge Roughness; 2.4.1 Double Pattern and Double Etching; 2.4.2 Self-aligned Double Patterning; References; 3 Random Dopant Fluctuation (RDF); 3.1 Introduction; 3.2 Physical Origin of Random Dopant Fluctuation
3.2.1 Ion Implantation Step3.2.2 Annealing Step for Repairing Damage and Activating Impurities; 3.3 Characterization of Random Dopant Fluctuation (RDF); 3.3.1 Kinetic Monte Carlo (KMC) Simulation; 3.3.1.1 Kinetic Monte Carlo Process for Random Discrete Dopant Distribution; 3.3.1.2 Continuous Electric Potential for Calculating the Drift-Diffusion Equation; 3.3.1.3 Device Simulation Using Drift-Diffusion Transport; 3.3.2 Analytical Model; References; 4 Work Function Variation (WFV); 4.1 Introduction; 4.2 The Physical Origins of WFV; 4.2.1 Characteristics of Metal Grains
4.2.2 Dependence of the Metal Work Function on the Grain Orientation4.2.3 Impact of WFV on VTH Variation; 4.3 Characterization of WFV; 4.3.1 Statistical Analysis; 4.3.2 Ratio of Average Grain Size to Gate Area (RGG); References; Variation-Aware Advanced CMOS Devices; 5 Tri-Gate MOSFET; 5.1 Introduction; 5.2 RDF in Tri-Gate MOSFET; 5.3 LER in Tri-Gate MOSFET; 5.4 WFV in Tri-Gate MOSFET; References; 6 Quasi-Planar Trigate (QPT) Bulk MOSFET; 6.1 QPT Bulk MOSFET; 6.2 Fabrication of a QPT Bulk MOSFET; 6.3 Results and Discussion
6.3.1 Improved Performance in QPT Bulk MOSFET (Vs. Conventional MOSFET)6.3.2 Suppressed VT Variation by the QPT Structure; 6.3.3 Improved Short Channel Effect in the QPT Bulk MOSFET; 6.3.4 Increased Narrow Width Effect in the QPT Bulk MOSFET; 6.3.5 A Compact Model for the QPT Bulk MOSFET; 6.4 Benefits of the Quasi-Planar Bulk CMOS Technology for 6T-SRAM; 6.4.1 Yield Enhancement in the QPT-Based 6-T SRAM Bit Cells; 6.4.2 Scaling of the Power Supply Voltage (VDD); References; 7 Tunnel FET (TFET); 7.1 Introduction; 7.2 Random Dopant Fluctuation (RDF) in TFET
2.2 Physical Origin of Line Edge Roughness2.2.1 LER of Mask Patterns; 2.2.2 Variations in the Dose of Light Exposure; 2.2.3 LER Generation in Chemically Amplified (CA) Resists; 2.2.4 Intrinsic Roughness of the Resist; 2.3 Characterization of Line Edge Roughness; 2.3.1 Line Edge Roughness (LER); 2.3.2 Line Width Roughness (LWR); 2.4 Impact of Double Patterning on Line Edge Roughness; 2.4.1 Double Pattern and Double Etching; 2.4.2 Self-aligned Double Patterning; References; 3 Random Dopant Fluctuation (RDF); 3.1 Introduction; 3.2 Physical Origin of Random Dopant Fluctuation
3.2.1 Ion Implantation Step3.2.2 Annealing Step for Repairing Damage and Activating Impurities; 3.3 Characterization of Random Dopant Fluctuation (RDF); 3.3.1 Kinetic Monte Carlo (KMC) Simulation; 3.3.1.1 Kinetic Monte Carlo Process for Random Discrete Dopant Distribution; 3.3.1.2 Continuous Electric Potential for Calculating the Drift-Diffusion Equation; 3.3.1.3 Device Simulation Using Drift-Diffusion Transport; 3.3.2 Analytical Model; References; 4 Work Function Variation (WFV); 4.1 Introduction; 4.2 The Physical Origins of WFV; 4.2.1 Characteristics of Metal Grains
4.2.2 Dependence of the Metal Work Function on the Grain Orientation4.2.3 Impact of WFV on VTH Variation; 4.3 Characterization of WFV; 4.3.1 Statistical Analysis; 4.3.2 Ratio of Average Grain Size to Gate Area (RGG); References; Variation-Aware Advanced CMOS Devices; 5 Tri-Gate MOSFET; 5.1 Introduction; 5.2 RDF in Tri-Gate MOSFET; 5.3 LER in Tri-Gate MOSFET; 5.4 WFV in Tri-Gate MOSFET; References; 6 Quasi-Planar Trigate (QPT) Bulk MOSFET; 6.1 QPT Bulk MOSFET; 6.2 Fabrication of a QPT Bulk MOSFET; 6.3 Results and Discussion
6.3.1 Improved Performance in QPT Bulk MOSFET (Vs. Conventional MOSFET)6.3.2 Suppressed VT Variation by the QPT Structure; 6.3.3 Improved Short Channel Effect in the QPT Bulk MOSFET; 6.3.4 Increased Narrow Width Effect in the QPT Bulk MOSFET; 6.3.5 A Compact Model for the QPT Bulk MOSFET; 6.4 Benefits of the Quasi-Planar Bulk CMOS Technology for 6T-SRAM; 6.4.1 Yield Enhancement in the QPT-Based 6-T SRAM Bit Cells; 6.4.2 Scaling of the Power Supply Voltage (VDD); References; 7 Tunnel FET (TFET); 7.1 Introduction; 7.2 Random Dopant Fluctuation (RDF) in TFET