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Preface ; Contents; Introduction: Work Around Moore's Law; 1.1 Scaling Limitations of Conventional Integration Technology: Work Around Moore's Law; Chapter-1; 1.1.1 More Moore: New Architectures; 1.1.1.1 SOI; 1.1.1.2 FinFET; 1.1.1.3 Twin-Well; 1.1.2 More Moore: New Materials; 1.1.2.1 High-K Dielectric; 1.1.2.2 Metal Gate; 1.1.2.3 Strained Si; 1.1.3 More than Moore (MTM): New Interconnects Schemes; 1.1.3.1 3D; 1.1.3.2 NoC; 1.1.3.3 Optical Interconnects; 1.1.3.4 Wireless Interconnects; 1.1.4 Beyond CMOS: New Devices; 1.1.4.1 Molecular Computer: CNT-Based; 1.1.4.2 Biological Computer: DNA-Based.
1.1.4.3 Quantum Computer: Qubits-Based1.2 Book Organization; References; Chapter-2; 3D/TSV-Enabling Technologies; 2.1 3D/TSV Technology; 2.2 TSV Structure; 2.3 Modeling and Design Challenges for 3D-ICs; 2.3.1 Electrical Modeling Challenges; 2.3.2 Thermal Management Challenges; 2.3.3 CAD Tools Challenges; 2.3.4 Technological, Yield, and Test Challenges; 2.3.5 Design Methodology Challenges; 2.3.6 Circuit Architecture Challenges; 2.3.6.1 3D FPGA; 2.3.6.2 3D Memory; 2.3.6.3 3D Processor; 2.3.6.4 3D NoC; 2.3.7 Power Delivery and Clock Distribution Challenges; 2.4 Summary; References; Chapter-3.
TSV Modeling and Analysis3.1 Introduction; 3.2 Modeling Methodology; 3.2.1 EM Modeling Methods; 3.2.2 Physics-Based Lumped Element Model for TSVs; 3.2.3 Nonlinearities (MOS Effect) of a TSV; 3.2.4 Comparison Between Quasi-Static and Full-Wave EM Simulations; 3.2.5 Dimensional Analysis Theory; 3.2.6 Closed-Form Expressions for TSV Model Elements Using Dimensional Analysis; 3.2.6.1 TSV Resistance Modeling; 3.2.6.2 TSV Capacitance Modeling; 3.2.6.3 TSV Inductance Modeling; 3.2.6.4 Final Element Formulae Using Curve Fitting; 3.3 TSV Model Linearization; 3.4 Summary; References; Chapter-4.
TSV Verification4.1 Validation Against Electromagnetic Simulation: Frequency Domain and Time Domain; 4.2 Studying the TSV Impact on Circuit Performance; 4.3 Validation Against Device Simulation; 4.4 Summary; References; Chapter-5; TSV Macro-Modeling Framework; 5.1 TSV Macro-Modeling Framework: Analysis and Verification; 5.2 Multi-Stacked TSV; 5.3 Summary; References; Chapter-6; TSV Design Applications: TSV-Based On-Chip Spiral Inductor, TSV-Based On-Chip Wireless Communications, and TSV-Based Bandpass Filter; 6.1 Introduction: TSV-Based On-Chip Spiral Inductor.
6.2 TSV-Based Spiral Architecture and Analysis6.2.1 The TSV-Based Spiral Inductor: Analysis and Characterization; 6.2.2 Lumped Element Model for the TSV-Based Spiral Inductor and Derivation of Qmax; 6.2.3 Closed-Form Expressions for the Inductance; 6.3 TSV-Based Spiral Verification; 6.3.1 Validation Against EM Simulation; 6.3.2 Comparison with Related Work; 6.4 Introduction: TSV-Based On-Chip Wireless Communications; 6.5 The Wireless TSV Architecture; 6.5.1 The Wireless TSV: Architecture and Analysis; 6.5.2 EM Simulation Results and Discussions; 6.5.3 Closed-Form Expressions.
1.1.4.3 Quantum Computer: Qubits-Based1.2 Book Organization; References; Chapter-2; 3D/TSV-Enabling Technologies; 2.1 3D/TSV Technology; 2.2 TSV Structure; 2.3 Modeling and Design Challenges for 3D-ICs; 2.3.1 Electrical Modeling Challenges; 2.3.2 Thermal Management Challenges; 2.3.3 CAD Tools Challenges; 2.3.4 Technological, Yield, and Test Challenges; 2.3.5 Design Methodology Challenges; 2.3.6 Circuit Architecture Challenges; 2.3.6.1 3D FPGA; 2.3.6.2 3D Memory; 2.3.6.3 3D Processor; 2.3.6.4 3D NoC; 2.3.7 Power Delivery and Clock Distribution Challenges; 2.4 Summary; References; Chapter-3.
TSV Modeling and Analysis3.1 Introduction; 3.2 Modeling Methodology; 3.2.1 EM Modeling Methods; 3.2.2 Physics-Based Lumped Element Model for TSVs; 3.2.3 Nonlinearities (MOS Effect) of a TSV; 3.2.4 Comparison Between Quasi-Static and Full-Wave EM Simulations; 3.2.5 Dimensional Analysis Theory; 3.2.6 Closed-Form Expressions for TSV Model Elements Using Dimensional Analysis; 3.2.6.1 TSV Resistance Modeling; 3.2.6.2 TSV Capacitance Modeling; 3.2.6.3 TSV Inductance Modeling; 3.2.6.4 Final Element Formulae Using Curve Fitting; 3.3 TSV Model Linearization; 3.4 Summary; References; Chapter-4.
TSV Verification4.1 Validation Against Electromagnetic Simulation: Frequency Domain and Time Domain; 4.2 Studying the TSV Impact on Circuit Performance; 4.3 Validation Against Device Simulation; 4.4 Summary; References; Chapter-5; TSV Macro-Modeling Framework; 5.1 TSV Macro-Modeling Framework: Analysis and Verification; 5.2 Multi-Stacked TSV; 5.3 Summary; References; Chapter-6; TSV Design Applications: TSV-Based On-Chip Spiral Inductor, TSV-Based On-Chip Wireless Communications, and TSV-Based Bandpass Filter; 6.1 Introduction: TSV-Based On-Chip Spiral Inductor.
6.2 TSV-Based Spiral Architecture and Analysis6.2.1 The TSV-Based Spiral Inductor: Analysis and Characterization; 6.2.2 Lumped Element Model for the TSV-Based Spiral Inductor and Derivation of Qmax; 6.2.3 Closed-Form Expressions for the Inductance; 6.3 TSV-Based Spiral Verification; 6.3.1 Validation Against EM Simulation; 6.3.2 Comparison with Related Work; 6.4 Introduction: TSV-Based On-Chip Wireless Communications; 6.5 The Wireless TSV Architecture; 6.5.1 The Wireless TSV: Architecture and Analysis; 6.5.2 EM Simulation Results and Discussions; 6.5.3 Closed-Form Expressions.