TY  - GEN
AB  - This book describes new and effective methodologies for modeling, analyzing and mitigating cell-internal signal electromigration in nanoCMOS, with significant circuit lifetime improvements and no impact on performance, area and power. The authors are the first to analyze and propose a solution for the electromigration effects inside logic cells of a circuit. They show in this book that an interconnect inside a cell can fail reducing considerably the circuit lifetime and they demonstrate a methodology to optimize the lifetime of circuits, by placing the output, Vdd and Vss pin of the cells in the less critical regions, where the electromigration effects are reduced. Readers will be enabled to apply this methodology only for the critical cells in the circuit, avoiding impact in the circuit delay, area and performance, thus increasing the lifetime of the circuit without loss in other characteristics. .
AU  - Posser, Gracieli,
AU  - Sapatnekar, Sachin S.,
AU  - Reis, Ricardo,
CN  - TK7868.L6
CN  - TA1-2040
DO  - 10.1007/978-3-319-48899-8
DO  - doi
ID  - 778255
KW  - Logic circuits.
KW  - Electrodiffusion.
LK  - https://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-48899-8
N2  - This book describes new and effective methodologies for modeling, analyzing and mitigating cell-internal signal electromigration in nanoCMOS, with significant circuit lifetime improvements and no impact on performance, area and power. The authors are the first to analyze and propose a solution for the electromigration effects inside logic cells of a circuit. They show in this book that an interconnect inside a cell can fail reducing considerably the circuit lifetime and they demonstrate a methodology to optimize the lifetime of circuits, by placing the output, Vdd and Vss pin of the cells in the less critical regions, where the electromigration effects are reduced. Readers will be enabled to apply this methodology only for the critical cells in the circuit, avoiding impact in the circuit delay, area and performance, thus increasing the lifetime of the circuit without loss in other characteristics. .
SN  - 9783319488998
SN  - 3319488996
T1  - Electromigration inside logic cells :modeling, analyzing and mitigating signal electromigration in NanoCMOS /
TI  - Electromigration inside logic cells :modeling, analyzing and mitigating signal electromigration in NanoCMOS /
UR  - https://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-48899-8
ER  -