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Preface; About the Book; Contents; About the Editors; Algorithms; 1 A Heuristic Framework for Priority Based Nurse Scheduling; Abstract; 1 Introduction; 2 Bibliographic Survey; 2.1 Integer Programming Model; 2.2 Satisfiablity Model; 2.3 Meta-Heuristic Search Techniques; 3 Open Issues; 3.1 Identification of the Parameters to be Used for Long-Term Scheduling of Nurses; 3.2 Decision Support System (DSS) in Making Dynamic or Flexible Scheduling; 4 Description of the Heuristic Method for Nurse Assignment in the Remote Centre; 4.1 Methodology; 4.2 Flow Diagram of the Proposed Framework
4.3 Experimental Results5 Conclusion; References; 2 A Divide-and-Conquer Algorithm for All Spanning Tree Generation; Abstract; 1 Introduction; 2 Literature Survey; 3 Existing Techniques for All Spanning Tree Generation; 3.1 Trees by Test and Select Method; 3.2 Elementary Tree Transformation Method; 3.3 Successive Reduction Method; 4 The New Algorithm (DCC_Trees); 4.1 Selection of a Reference Vertex and Elimination of Its Pendant Edges; 4.2 Divide: Decomposition of the Graph; 4.3 Conquer: Searching for Connectors; 4.4 Combine: Forming the Trees; 4.5 Rejoining the Pendant Edges
4.6 Algorithm DCC_Trees4.7 Data Structures and Complexity Issues; 4.8 Salient Features of DCC_Trees; 5 Experimental Results; 6 Applications; 7 Conclusion; References; Circuit Synthesis of Marked Clique Problem using Quantum Walk; 1 Introduction; 2 Background; 2.1 Discrete Walk in Line; 2.2 Continuous Quantum Walk; 2.3 Discrete Quantum Walk in a Graph; 3 Algorithm for Finding the Marked Clique; 3.1 Steps for Finding Marked Clique Using Our Proposed Algorithm; 3.2 Calculation of the Degree; 3.3 Applying Hadamard Gate; 3.4 Starting Quantum Walk; 3.5 Checking Interconnection Between Vertices
3.6 Getting the Clique3.7 Coin Operator on Marked List; 4 Analysis of the Circuit; 4.1 Applying Hadamard Gate; 4.2 Circuit for Different Coin States; 4.3 Interconnection Between Adjacent Vertices; 5 Simulation of Marked Clique Problem; 6 Circuit for General Graph; 7 Conclusion; References; 4 Abort-Free STM: A Non-blocking Concurrency Control Approach Using Software Transactional Memory; Abstract; 1 Introduction; 2 Proposed Abort Free STM; 2.1 Terminologies; 2.2 Basic Concepts; 2.3 Data Structure; 2.4 Opening Data Object; 2.5 Committing of Transactions; 2.6 Algorithm
3 Making AFTM Abort Free: A Critical Analysis4 Performance Evaluation by Experiments; 4.1 Experimental Results with Increased Number of Write Transactions; 4.2 Experimental Results with Increased Transactions' Execution Time; 5 Concluding Remarks; References; Graph Problems Performance Comparison Using Intel Xeon and Intel Xeon-Phi; 1 Introduction; 2 Graph 500 Benchmark; 3 Betweenness Centrality Benchmark; 4 Experiments; 4.1 Experimental Setup; 5 Results; 6 Conclusion and Future Work; References; 6 A Novel Image Steganographic Scheme Using 8 \times 8 Sudoku Puzzle; Abstract; 1 Introduction
4.3 Experimental Results5 Conclusion; References; 2 A Divide-and-Conquer Algorithm for All Spanning Tree Generation; Abstract; 1 Introduction; 2 Literature Survey; 3 Existing Techniques for All Spanning Tree Generation; 3.1 Trees by Test and Select Method; 3.2 Elementary Tree Transformation Method; 3.3 Successive Reduction Method; 4 The New Algorithm (DCC_Trees); 4.1 Selection of a Reference Vertex and Elimination of Its Pendant Edges; 4.2 Divide: Decomposition of the Graph; 4.3 Conquer: Searching for Connectors; 4.4 Combine: Forming the Trees; 4.5 Rejoining the Pendant Edges
4.6 Algorithm DCC_Trees4.7 Data Structures and Complexity Issues; 4.8 Salient Features of DCC_Trees; 5 Experimental Results; 6 Applications; 7 Conclusion; References; Circuit Synthesis of Marked Clique Problem using Quantum Walk; 1 Introduction; 2 Background; 2.1 Discrete Walk in Line; 2.2 Continuous Quantum Walk; 2.3 Discrete Quantum Walk in a Graph; 3 Algorithm for Finding the Marked Clique; 3.1 Steps for Finding Marked Clique Using Our Proposed Algorithm; 3.2 Calculation of the Degree; 3.3 Applying Hadamard Gate; 3.4 Starting Quantum Walk; 3.5 Checking Interconnection Between Vertices
3.6 Getting the Clique3.7 Coin Operator on Marked List; 4 Analysis of the Circuit; 4.1 Applying Hadamard Gate; 4.2 Circuit for Different Coin States; 4.3 Interconnection Between Adjacent Vertices; 5 Simulation of Marked Clique Problem; 6 Circuit for General Graph; 7 Conclusion; References; 4 Abort-Free STM: A Non-blocking Concurrency Control Approach Using Software Transactional Memory; Abstract; 1 Introduction; 2 Proposed Abort Free STM; 2.1 Terminologies; 2.2 Basic Concepts; 2.3 Data Structure; 2.4 Opening Data Object; 2.5 Committing of Transactions; 2.6 Algorithm
3 Making AFTM Abort Free: A Critical Analysis4 Performance Evaluation by Experiments; 4.1 Experimental Results with Increased Number of Write Transactions; 4.2 Experimental Results with Increased Transactions' Execution Time; 5 Concluding Remarks; References; Graph Problems Performance Comparison Using Intel Xeon and Intel Xeon-Phi; 1 Introduction; 2 Graph 500 Benchmark; 3 Betweenness Centrality Benchmark; 4 Experiments; 4.1 Experimental Setup; 5 Results; 6 Conclusion and Future Work; References; 6 A Novel Image Steganographic Scheme Using 8 \times 8 Sudoku Puzzle; Abstract; 1 Introduction