TY  - GEN
DO  - 10.1007/978-3-319-53883-9
DO  - doi
T1  - Introduction to logic circuits & logic design with Verilog /
AU  - LaMeres, Brock J.,
ET  - 1st edition.
CN  - TK7868.L6
N1  - Includes index.
ID  - 781083
KW  - Logic circuits.
KW  - Logic design.
KW  - Verilog (Computer hardware description language)
SN  - 9783319538839
SN  - 3319538837
TI  - Introduction to logic circuits & logic design with Verilog /
LK  - https://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-53883-9
UR  - https://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-53883-9
ER  -