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3.4 SummaryReferences; Chapter 4: Energy-Efficient Software Design for Video Systems; 4.1 Power-Efficient Application Parallelization; 4.1.1 Power-Efficient Workload Balancing; 4.2 Compute Configuration; 4.2.1 Uniform Tiling; 4.2.2 Non-uniform Tiling; 4.2.2.1 Evaluation of Non-uniform Tiling; 4.2.3 Frequency Estimation (fk,m); 4.2.4 Maximum Workload Estimation (ak,m); 4.2.5 Self-Regulated Frequency Model; 4.2.5.1 Frequency Estimation; 4.2.5.2 Runtime Frequency Estimation Model Adjustment; 4.2.5.3 Core Frequency Allocation per Epoch; 4.2.6 Retiling; 4.3 Application Configuration
Chapter 1: Introduction; 1.1 Multimedia Systems; 1.1.1 Multimedia Processing Architectures; 1.2 Fundamentals of Video Processing; 1.2.1 Video Compression; 1.3 Design Complexity of a Video System; 1.3.1 The Dark Silicon Problem; 1.3.2 SRAM Aging; 1.4 Video System Design Challenges; 1.4.1 Software Layer Challenges; 1.4.2 Hardware Layer Challenges; 1.5 Limitations of State-of-the-Art; 1.6 Design and Optimization Methods Discussed in This Book; 1.6.1 Software Layer Design; 1.6.1.1 Power-Efficient Resource Budgeting/Parallelization; 1.6.1.2 Power-Efficient Software Design
1.6.2 Hardware Layer Design1.6.2.1 Power-Efficient Accelerator Design; 1.6.2.2 Shared Hardware Accelerator Scheduling; 1.6.2.3 Memory Subsystem Design; 1.6.3 Open-Source Tools; 1.7 Book Outline; References; Chapter 2: Background and Related Work; 2.1 Overview of Video Processing; 2.1.1 Intra- and Inter-frame Processing; 2.2 Overview of Video Coding; 2.2.1 H.264/AVC and HEVC; 2.2.1.1 Intra-prediction Modes; 2.2.1.2 HEVC Inter-prediction Modes; 2.2.2 Parallelization; 2.2.3 DVC and HDVC; 2.2.3.1 Distributed Video Coding; 2.2.3.2 Hybrid Distributed Video Coding; 2.3 Technological Challenges
2.3.1 Dark Silicon or Power Wall2.3.2 NBTI-Induced SRAM Aging; 2.3.3 Other Challenges; 2.4 Related Work; 2.4.1 Video System Software; 2.4.1.1 Parallelization and Workload Balancing; 2.4.1.2 Power-Efficient Video Processing Algorithms; 2.4.1.3 Mitigating Dark Silicon at Software Level; 2.4.2 Video Systems Hardware; 2.4.2.1 Efficient Hardware Design and Architectures; 2.4.2.2 Memory Subsystem; 2.4.2.3 Accelerator Allocation/Scheduling; 2.4.2.4 SRAM Aging Rate Reduction Methods; 2.4.2.5 Encountering the Power Wall at Hardware Level; 2.5 Summary of Related Work; References
Chapter 3: Power-Efficient Video System Design3.1 System Overview; 3.1.1 Design Time Feature Support; 3.1.2 Runtime Features and System Dynamics; 3.2 Application and Motivational Analysis; 3.2.1 Video Application Parallelization; 3.2.2 Workload Variations; 3.2.3 HEVC Complexity Analysis; 3.2.3.1 Texture and PU Size Interdependence; 3.2.3.2 Edge Gradients and Intra Angular Modes; 3.3 Hardware Platform Analysis; 3.3.1 Heterogeneity Among Computing Nodes; 3.3.2 Memory Subsystem; 3.3.2.1 Analysis of Motion Estimation; 3.3.2.2 Hybrid Memories; 3.3.3 Analysis of Different Aging Balancing Circuits
Chapter 1: Introduction; 1.1 Multimedia Systems; 1.1.1 Multimedia Processing Architectures; 1.2 Fundamentals of Video Processing; 1.2.1 Video Compression; 1.3 Design Complexity of a Video System; 1.3.1 The Dark Silicon Problem; 1.3.2 SRAM Aging; 1.4 Video System Design Challenges; 1.4.1 Software Layer Challenges; 1.4.2 Hardware Layer Challenges; 1.5 Limitations of State-of-the-Art; 1.6 Design and Optimization Methods Discussed in This Book; 1.6.1 Software Layer Design; 1.6.1.1 Power-Efficient Resource Budgeting/Parallelization; 1.6.1.2 Power-Efficient Software Design
1.6.2 Hardware Layer Design1.6.2.1 Power-Efficient Accelerator Design; 1.6.2.2 Shared Hardware Accelerator Scheduling; 1.6.2.3 Memory Subsystem Design; 1.6.3 Open-Source Tools; 1.7 Book Outline; References; Chapter 2: Background and Related Work; 2.1 Overview of Video Processing; 2.1.1 Intra- and Inter-frame Processing; 2.2 Overview of Video Coding; 2.2.1 H.264/AVC and HEVC; 2.2.1.1 Intra-prediction Modes; 2.2.1.2 HEVC Inter-prediction Modes; 2.2.2 Parallelization; 2.2.3 DVC and HDVC; 2.2.3.1 Distributed Video Coding; 2.2.3.2 Hybrid Distributed Video Coding; 2.3 Technological Challenges
2.3.1 Dark Silicon or Power Wall2.3.2 NBTI-Induced SRAM Aging; 2.3.3 Other Challenges; 2.4 Related Work; 2.4.1 Video System Software; 2.4.1.1 Parallelization and Workload Balancing; 2.4.1.2 Power-Efficient Video Processing Algorithms; 2.4.1.3 Mitigating Dark Silicon at Software Level; 2.4.2 Video Systems Hardware; 2.4.2.1 Efficient Hardware Design and Architectures; 2.4.2.2 Memory Subsystem; 2.4.2.3 Accelerator Allocation/Scheduling; 2.4.2.4 SRAM Aging Rate Reduction Methods; 2.4.2.5 Encountering the Power Wall at Hardware Level; 2.5 Summary of Related Work; References
Chapter 3: Power-Efficient Video System Design3.1 System Overview; 3.1.1 Design Time Feature Support; 3.1.2 Runtime Features and System Dynamics; 3.2 Application and Motivational Analysis; 3.2.1 Video Application Parallelization; 3.2.2 Workload Variations; 3.2.3 HEVC Complexity Analysis; 3.2.3.1 Texture and PU Size Interdependence; 3.2.3.2 Edge Gradients and Intra Angular Modes; 3.3 Hardware Platform Analysis; 3.3.1 Heterogeneity Among Computing Nodes; 3.3.2 Memory Subsystem; 3.3.2.1 Analysis of Motion Estimation; 3.3.2.2 Hybrid Memories; 3.3.3 Analysis of Different Aging Balancing Circuits