000824540 000__ 01706cam\a2200481Mu\4500 000824540 001__ 824540 000824540 005__ 20230306144126.0 000824540 006__ m\\\\\o\\d\\\\\\\\ 000824540 007__ cr\cn\nnnunnun 000824540 008__ 171118s2017\\\\ii\\\\\\o\\\\\000\0\eng\d 000824540 019__ $$a1011681971 000824540 020__ $$a9788132237693$$q(electronic book) 000824540 020__ $$a8132237692$$q(electronic book) 000824540 020__ $$z9788132237679 000824540 020__ $$z8132237676 000824540 035__ $$aSP(OCoLC)on1012344097 000824540 035__ $$aSP(OCoLC)1012344097$$z(OCoLC)1011681971 000824540 040__ $$aEBLCP$$beng$$epn$$cEBLCP$$dN$T$$dGW5XE$$dOCLCF$$dOCLCQ$$dUAB$$dMERER$$dVT2$$dYDX$$dOCLCQ$$dU3W 000824540 049__ $$aISEA 000824540 050_4 $$aTK7895.G36 000824540 050_4 $$aTA1-2040 000824540 08204 $$a621.395$$223 000824540 08204 $$a620 000824540 1001_ $$aParab, Jivan S. 000824540 24510 $$aHands-on Experience with Altera FPGA Development Boards. 000824540 260__ $$aNew Delhi :$$bSpringer India,$$c2017. 000824540 300__ $$a1 online resource (159 pages) 000824540 336__ $$atext$$btxt$$2rdacontent 000824540 337__ $$acomputer$$bc$$2rdamedia 000824540 338__ $$aonline resource$$bcr$$2rdacarrier 000824540 506__ $$aAccess limited to authorized users. 000824540 588__ $$aDescription based on print version record. 000824540 650_0 $$aGate array circuits. 000824540 650_0 $$aField programmable gate arrays. 000824540 650_0 $$aProgrammable array logic. 000824540 650_0 $$aRouters (Computer networks) 000824540 7001_ $$aGad, Rajendra S. 000824540 7001_ $$aNaik, G. M. 000824540 77608 $$iPrint version:$$aParab, Jivan S.$$tHands-on Experience with Altera FPGA Development Boards.$$dNew Delhi : Springer India, ©2017$$z9788132237679 000824540 852__ $$bebk 000824540 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-81-322-3769-3$$zOnline Access$$91397441.1 000824540 909CO $$ooai:library.usi.edu:824540$$pGLOBAL_SET 000824540 980__ $$aEBOOK 000824540 980__ $$aBIB 000824540 982__ $$aEbook 000824540 983__ $$aOnline 000824540 994__ $$a92$$bISE