TY  - GEN
AB  - This book provides a single-source reference to the state-of-the-art in logic synthesis.  Readers will benefit from the authors’ expert perspectives on new technologies and logic synthesis, new data structures, big data and logic synthesis, and convergent logic synthesis.  The authors describe techniques that will enable readers to take advantage of recent advances in big data techniques and frameworks in order to have better logic synthesis algorithms. Describes how to map logic into new post-CMOS technologies and devices; Explains how to use different types of internal data structures, such as Majority-Inverter-Graphs; Discusses how to mix logic synthesis and physical design in order to have more effective and convergent ways to perform logic synthesis integrated in a complete flow.
AU  - Reis, André Inácio.
AU  - Drechsler, Rolf.
CN  - TK7874
CY  - Cham :
DA  - ©2018.
DO  - 10.1007/978-3-319-67295-3
DO  - doi
ID  - 824647
KW  - Logic design
KW  - Integrated circuits
KW  - Computer-aided design.
LK  - https://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-67295-3
N1  - 6.6 Generate Partial SDCs for Logic Computation KL-Cuts.
N2  - This book provides a single-source reference to the state-of-the-art in logic synthesis.  Readers will benefit from the authors’ expert perspectives on new technologies and logic synthesis, new data structures, big data and logic synthesis, and convergent logic synthesis.  The authors describe techniques that will enable readers to take advantage of recent advances in big data techniques and frameworks in order to have better logic synthesis algorithms. Describes how to map logic into new post-CMOS technologies and devices; Explains how to use different types of internal data structures, such as Majority-Inverter-Graphs; Discusses how to mix logic synthesis and physical design in order to have more effective and convergent ways to perform logic synthesis integrated in a complete flow.
PB  - Springer,
PP  - Cham :
PY  - ©2018.
SN  - 9783319672953
SN  - 3319672959
T1  - Advanced logic synthesis /
TI  - Advanced logic synthesis /
UR  - https://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-67295-3
ER  -