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Energy efficient high performance processors : recent approaches for designing green high performance computing / Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay.

Haj-Yahya, Jawad, author.; Mendelson, Avi, author.; Ben-Asher, Yosi, author.; Caṭṭopādhyāẏa, Anupama, 1956- author.
2018
QA76.88
Available Online
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Title
Energy efficient high performance processors : recent approaches for designing green high performance computing / Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay.
Author
Haj-Yahya, Jawad, author.
ISBN
9789811085543 (electronic book)
9811085544 (electronic book)
9789811085536
DOI
https://doi.org/10.1007/978-981-10-8554-3
Published
Singapore : Springer, 2018.
Language
English
Description
1 online resource (xiv, 165 pages) : illustrations.
Item Number
10.1007/978-981-10-8554-3 doi
Call Number
QA76.88
Dewey Decimal Classification
004/.3
Summary
This book explores energy efficiency techniques for high-performance computing (HPC) systems using power-management methods. Adopting a step-by-step approach, it describes power-management flows, algorithms and mechanism that are employed in modern processors such as Intel Sandy Bridge, Haswell, Skylake and other architectures (e.g. ARM). Further, it includes practical examples and recent studies demonstrating how modem processors dynamically manage wide power ranges, from a few milliwatts in the lowest idle power state, to tens of watts in turbo state. Moreover, the book explains how thermal and power deliveries are managed in the context this huge power range. The book also discusses the different metrics for energy efficiency, presents several methods and applications of the power and energy estimation, and shows how by using innovative power estimation methods and new algorithms modern processors are able to optimize metrics such as power, energy, and performance. Different power estimation tools are presented, including tools that break down the power consumption of modern processors at sub-processor core/thread granularity. The book also investigates software, firmware and hardware coordination methods of reducing power consumption, for example a compiler-assisted power management method to overcome power excursions. Lastly, it examines firmware algorithms for dynamic cache resizing and dynamic voltage and frequency scaling (DVFS) for memory sub-systems.
Bibliography, etc. Note
Includes bibliographical references.
Access Note
Access limited to authorized users.
Digital File Characteristics
text file PDF
Source of Description
Online resource; title from PDF title page (SpringerLink, viewed March 26, 2018).
Added Author
Mendelson, Avi, author.
Ben-Asher, Yosi, author.
Caṭṭopādhyāẏa, Anupama, 1956- author.
Series
Computer architecture and design methodologies.
Available in Other Form
Print version: 9789811085536
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Introduction
Background
DOEE: Dynamic Optimization framework for better Energy Efficiency
Fine-grain Power Breakdown of Modern Out-Of-Order Cores and its implications on Skylake based systems
Compiler-Directed Power Management for Superscalars
SEEM: Symbolic Execution for Energy Modeling
Related Works
Conclusions and Future Work.

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