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000827159 019__ $$a1030341682$$a1030498347$$a1030605736$$a1030764174$$a1033651936
000827159 020__ $$a9783319751573$$q(electronic book)
000827159 020__ $$a3319751573$$q(electronic book)
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000827159 050_4 $$aTK7874
000827159 08204 $$a621.3815$$223
000827159 24500 $$aPathological elements in analog circuit design /$$cMourad Fakhfakh, Marian Pierzchala, editors.
000827159 264_1 $$aCham, Switzerland :$$bSpringer,$$c2018.
000827159 300__ $$a1 online resource (xviii, 360 pages) :$$billustrations.
000827159 336__ $$atext$$btxt$$2rdacontent
000827159 337__ $$acomputer$$bc$$2rdamedia
000827159 338__ $$aonline resource$$bcr$$2rdacarrier
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000827159 4901_ $$aLecture notes in electrical engineering,$$x1876-1100 ;$$vvolume 479
000827159 5050_ $$aIntro; Foreword; Preface; Acknowledgements; Contents; Contributors; Pathological Elements in the Analysis and the Synthesis of Analog Circuits; 1 Symbolic Analysis and Synthesis of Analog Circuits Using Nullors and Pathological Mirror Elements; Abstract; 1 Introduction; 2 Symbolic Nodal Analysis of Circuits Modeled by Nullors and Mirrors; 3 Adjoint Transformations of Circuits Containing Nullors and Mirrors; 4 Synthesis of Nullators, Norators, Voltage Mirrors and Current Mirrors; 5 CMOS Implementation of Unity-Gain-Cells and Mixed-Mode Analog Circuits; 6 Conclusions; Acknowledgements
000827159 5058_ $$a4.1 Expansion of Determinants of Pathological Element-Based Residual Circuits4.2 The Algorithm of Determinant Expansion Directly from HOSC of Residual Circuits; 5 Circuit Decomposition in GPEM; 5.1 The Downward Analysis; 5.2 The Upward Hierarchical Analysis; 6 Conclusion; Acknowledgements; References; 3 Two-Graph Based Semi-topological Analysis of Electronic Circuits with Nullors and Pathological Mirrors; Abstract; 1 Introduction; 2 Primitive Signal-Flow Graphs as a Base of Semi-topological Analysis of Electronic Circuits with Nullors and Mirrors; 3 Two-Graph Models of Nullors and Mirrors
000827159 5058_ $$a3.1 Two-Graph Stamps of Nullators and Mirrors3.2 Examples; 3.2.1 The ICCII+-Base Inverting Low-Pass Filter; 3.2.2 The Filter with Second Generation Current Conveyor; 4 Conclusions; References; 4 Circuit Analyses with Nullors; Abstract; 1 Introduction; 2 Nullor Equivalences; 3 Loop Current Method for Circuits with Nullors; 4 Nodal Analysis Method for Circuits with Nullors; 5 The Generalized Topological Formula for Transfer Function Generation by Two-Graph Tree Enumeration; 5.1 Introduction; 5.2 Controlled Source Modelling in the Two Graphs
000827159 5058_ $$a5.3 Generalized Topological Formula for Network Function Generation5.4 Algorithm for Tree Enumeration in a Graph Represented on Levels; 5.5 Algorithm for Sequential Generation of the Sign Factor; 5.6 Automatic Generation of the Transfer Functions; 5.7 Description of the Software Application SATE-Symbolic Analisys by Trees Enumeration; 6 Examples; 7 Conclusions; References; 5 Symbolic Sensitivity Analysis Enhanced by Nullor Model and Modified Coates Flow Graph; Abstract; 1 Introduction; 2 Nullor-Modified Coates Flow Graph Symbolic Sensitivity Analysis Method
000827159 506__ $$aAccess limited to authorized users.
000827159 520__ $$aThis book is a compilation and a collection of tutorials and recent advances in the use of nullors (combinations of nullators and norators) and pathological mirrors in analog circuit and system design. It highlights the basic theory, trends and challenges in the field, making it an excellent reference resource for researchers and designers working in the synthesis, analysis, and design of analog integrated circuits. With its tutorial character, it can also be used for teaching. Singular elements such as nullors and pathological mirrors can arguably be considered as universal blocks since they can represent all existing analog building blocks, and they allow complex integrated circuits to be designed simply and effectively. These pathological elements are now used in a wide range of applications in modern circuit/system theory, and also in design practice.
000827159 588__ $$aOnline resource; title from PDF title page (SpringerLink, viewed March 28, 2018).
000827159 650_0 $$aAnalog integrated circuits$$xDesign.
000827159 7001_ $$aFakhfakh, Mourad,$$eeditor.
000827159 7001_ $$aPierzchala, Marian,$$eeditor.
000827159 77608 $$iPrint version: $$z3319751565$$z9783319751566$$w(OCoLC)1018191034
000827159 830_0 $$aLecture notes in electrical engineering ;$$vv. 479.
000827159 852__ $$bebk
000827159 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-75157-3$$zOnline Access$$91397441.1
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000827159 980__ $$aBIB
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