@article{838344,
      note = {International conference proceedings.},
      author = {Götz, Marcelo, and Schirner, Gunar, and Wehrmeister,  Marco Aurélio, and Al Faruque, Mohammad Abdullah, and  Rettberg, Achim,},
      url = {http://library.usi.edu/record/838344},
      title = {System level design from HW/SW to memory for embedded  systems : 5th IFIP TC 10 International Embedded Systems  Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3-6,  2015, Proceedings /. IFIP TC10 Working Conference:  International Embedded Systems Symposium},
      abstract = {This book constitutes the refereed proceedings of the 5th  IFIP TC 10 International Embedded Systems Symposium, IESS  2015, held in Foz do Iguaçu, Brazil, in November 2015. The  18 full revised papers presented were carefully reviewed  and selected from 25 submissions. The papers present a  broad discussion on the design, analysis and verification  of embedded and cyber-physical systems including design  methodologies, verification, performance analysis, and  real-time systems design. They are organized in the  following topical sections: cyber-physical systems,  system-level design; multi/many-core system design; memory  system design; and embedded HW/SW design and applications.},
      doi = {https://doi.org/10.1007/978-3-319-90023-0},
      recid = {838344},
      pages = {1 online resource (xii, 231 pages) :},
}