System level design from HW/SW to memory for embedded systems :: 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3-6, 2015, Proceedings /: Marcelo Götz, Gunar Schirner, Marco Aurélio Wehrmeister, Mohammad Abdullah Al Faruque, Achim Rettberg (eds.).

Götz, Marcelo,; Schirner, Gunar,; Wehrmeister, Marco Aurélio,; Al Faruque, Mohammad Abdullah,; Rettberg, Achim,

doi:10.1007/978-3-319-90023-0

System level design from HW/SW to memory for embedded systems : 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3-6, 2015, Proceedings / Marcelo Götz, Gunar Schirner, Marco Aurélio Wehrmeister, Mohammad Abdullah Al Faruque, Achim Rettberg (eds.).

IFIP TC10 Working Conference: International Embedded Systems Symposium (5th : 2015 : Foz do Iguaçu, Brazil); Götz, Marcelo, editor.; Schirner, Gunar, editor.; Wehrmeister, Marco Aurélio, editor.; Al Faruque, Mohammad Abdullah, editor.; Rettberg, Achim, editor.

2017

TK7895.E42

Available Online

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Title

System level design from HW/SW to memory for embedded systems : 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3-6, 2015, Proceedings / Marcelo Götz, Gunar Schirner, Marco Aurélio Wehrmeister, Mohammad Abdullah Al Faruque, Achim Rettberg (eds.).

Meeting Name

IFIP TC10 Working Conference: International Embedded Systems Symposium (5th : 2015 : Foz do Iguaçu, Brazil)

ISBN

9783319900230 (electronic book)
3319900234 (electronic book)
9783319900223

DOI

https://doi.org/10.1007/978-3-319-90023-0

Published

Cham, Switzerland : Springer, 2017.

Language

English

Description

1 online resource (xii, 231 pages) : illustrations.

Item Number

10.1007/978-3-319-90023-0 doi

Call Number

TK7895.E42

Dewey Decimal Classification

006.2/2

Summary

This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015. The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.

Note

International conference proceedings.
Includes author index.

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Access limited to authorized users.

Source of Description

Online resource; title from PDF title page (SpringerLink, viewed April 24, 2018).

Added Author

Götz, Marcelo, editor.
Schirner, Gunar, editor.
Wehrmeister, Marco Aurélio, editor.
Al Faruque, Mohammad Abdullah, editor.
Rettberg, Achim, editor.

Series

IFIP advances in information and communication technology ; 523. 1868-4238

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