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000838685 019__ $$a1032353878$$a1032581683$$a1032689411$$a1034544896$$a1038417984
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000838685 0247_ $$a10.1007/978-3-319-75465-9$$2doi
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000838685 1001_ $$aChampac, Victor,$$eauthor.
000838685 24510 $$aTiming performance of nanometer digital circuits under process variations /$$cVictor Champac, Jose Garcia Gervacio.
000838685 264_1 $$aCham, Switzerland :$$bSpringer,$$c[2018]
000838685 264_4 $$c©2018
000838685 300__ $$a1 online resource.
000838685 336__ $$atext$$btxt$$2rdacontent
000838685 337__ $$acomputer$$bc$$2rdamedia
000838685 338__ $$aonline resource$$bcr$$2rdacarrier
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000838685 4901_ $$aFrontiers in electronic testing ;$$vVolume 39
000838685 504__ $$aIncludes bibliographical references and index.
000838685 5050_ $$aIntro; Preface; Contents; About the Authors; Acronyms; 1 Introduction; 1.1 Semiconductor Technology; 1.2 First Words of Process Variations on Semiconductor Technologies; 1.3 Making Modern Digital Circuits; 1.3.1 Nanometer Design; 1.3.2 Impact of Process Variation on Nanometer Design; 1.3.3 Corner-Based Nanometer Design; 1.4 Need of Statistical Circuit Design; References; 2 Mathematical Fundamentals; 2.1 Basic Definitions; 2.1.1 Definitions; 2.2 Random Variables; 2.2.1 Discrete Random Variables; 2.2.1.1 Probability Mass Function; 2.2.1.2 Cumulative Distribution Function.
000838685 5058_ $$a2.2.2 Continuous Random Variables2.2.2.1 Probability Density Function; 2.2.2.2 Cumulative Distribution Function; 2.3 Characteristics of Random Variables; 2.3.1 Mean; 2.3.1.1 Discrete Variables; 2.3.1.2 Continuous Variables; 2.3.2 Variance; 2.3.2.1 Discrete Variables; 2.3.2.2 Continuous Variables; 2.4 Distributions of Random Variables; 2.4.1 Continuous Uniform Distribution; 2.4.2 Continuous Normal Distribution; 2.5 Relationship Properties of Random Variables; 2.5.1 Covariance; 2.5.1.1 Discrete Variables; 2.5.1.2 Continuous Variables; 2.5.2 Correlation; 2.6 Sum of Normal Random Variables.
000838685 5058_ $$a2.6.1 Sum of Two Normal Random Variables2.6.1.1 Mean; 2.6.1.2 Variance; 2.6.2 Sum of More than Two Normal Random Variables; 2.6.2.1 Mean; 2.6.2.2 Variance; 2.7 Series and Theorem of Taylor; 2.7.1 Basic Definitions; 2.7.2 Single Variable; 2.7.3 Two Variables; 2.8 Summary; References; 3 Process Variations; 3.1 Introduction; 3.2 CMOS Manufacturing Process; 3.2.1 CMOS Technology Overview; 3.2.2 Main Manufacturing Processes; 3.2.2.1 Photolithography; 3.2.2.2 Etching; 3.2.2.3 Doping; 3.2.2.4 Deposition; 3.2.2.5 Planarization; 3.3 Sources of Process Variations.
000838685 5058_ $$a3.3.1 Sources of Variation on Device Parameters3.3.1.1 Sources of Variation in the Channel Length; 3.3.1.2 Line Edge Roughness; 3.3.1.3 Optical Proximity Effect; 3.3.1.4 Sources of Variation in the Channel Width; 3.3.1.5 Sources of Variation in the Gate Oxide Thickness; 3.3.1.6 Sources of Variation in the Threshold Voltage; 3.3.1.7 Random Dopant Fluctuation; 3.3.2 Sources of Variation in Interconnections; 3.3.2.1 Chemical Mechanical Polishing; 3.4 Behavior of Process Parameter Variations; 3.4.1 Systematic; 3.4.2 Nonsystematic; 3.4.2.1 Inter-die Variations; 3.4.2.2 Intra-Die Variations.
000838685 5058_ $$a3.5 Parameter Modeling3.6 Spatial Correlation Modeling; 3.6.1 Exponential Model; 3.6.1.1 Example; 3.6.2 Grid Model; 3.7 Summary; References; 4 Gate Delay Under Process Variations; 4.1 Mathematical Formulation of the Statistical Delay of a Logic Gate; 4.1.1 Mean Delay of a Gate; 4.1.2 Variance of the Delay of a Gate; 4.2 Delay of Logic Gates Under Process Variations; 4.3 Computing Delay Variance of an Inverter; 4.3.1 Analytical Delay Model; 4.3.2 Sensitivity Delay Model; 4.3.3 Example of Computing Delay Standard Deviation of an Inverter; 4.4 Computing Delay Variance of a Nand Gate.
000838685 506__ $$aAccess limited to authorized users.
000838685 520__ $$aThis book discusses the digital design of integrated circuits under process variations, with a focus on design-time solutions. The authors describe a step-by-step methodology, going from logic gates to logic paths to the circuit level. Topics are presented in comprehensively, without overwhelming use of analytical formulations. Emphasis is placed on providing digital designers with understanding of the sources of process variations, their impact on circuit performance and tools for improving their designs to comply with product specifications. Various circuit-level "design hints" are highlighted, so that readers can use then to improve their designs. A special treatment is devoted to unique design issues and the impact of process variations on the performance of FinFET based circuits. This book enables readers to make optimal decisions at design time, toward more efficient circuits, with better yield and higher reliability.
000838685 588__ $$aVendor-supplied metadata.
000838685 650_0 $$aNanoelectronics$$xMaterials.
000838685 650_0 $$aIntegrated circuits$$xDesign and construction.
000838685 650_0 $$aRadio circuits.
000838685 7001_ $$aGervacio, Jose Garcia,$$eauthor.
000838685 77608 $$iPrint version:$$aChampac, Victor.$$tTiming performance of nanometer digital circuits under process variations.$$dCham, Switzerland : Springer, [2018]$$z3319754645$$z9783319754642$$w(OCoLC)1019647085
000838685 830_0 $$aFrontiers in electronic testing ;$$v39.
000838685 852__ $$bebk
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