Intro; Preface; Introduction; Contents; 1 Taking the Next Step in GaN: Bulk GaN Substrates and GaN-on-Si Epitaxy for Electronics; 1.1 Introduction; 1.2 Brief Overview of the State of the Art of GaN Bulk Crystal Growth and Native Substrates; 1.3 Homoepitaxy on Native Substrates; 1.4 Heteroepitaxy of GaN; 1.5 Heterostructures Made from III-Nitrides: A Family of Semiconductors as a Powerful Toolbox for Device Design by Material Engineering; 1.6 Piezoelectric Field in III-Nitrides; 1.7 Metal-Organic Vapor Phase Deposition: The Most Suited Technique for III-Nitride Epilayer Deposition

1.8 Buildup of Typical AlGaN/GaN Layer Structure on a Si Substrate and Pitfalls to Avoid1.8.1 The Nucleation Layer; Crystal Orientation of the Silicon Substrate; Gallium Melt-Back; AlN Microstructure; 1.8.2 The Buffer for Strain Management; 1.8.3 The Active Part of the AlGaN/GaN HEMT; 1.8.4 Capping and Surface Passivation Layers: From GaN Cap to In Situ SiN; 1.9 Conclusions; References; 2 Lateral GaN HEMT Structures; 2.1 Introduction; 2.2 The Basic GaN HEMT Device: Polarization, Surface States, and the 2DEG; 2.3 Structures for Higher Mobility; 2.4 Structures for Current Collapse Mitigation

2.5 Structures for High Voltage Operation2.6 Structures for Normally Off Operation; References; 3 Vertical GaN Transistors for Power Electronics; 3.1 Introduction; 3.2 Current Aperture Vertical Electron Transistors (CAVETs); 3.2.1 Operation Principle of the CAVET; Planar CAVETs; Trench CAVET; 3.2.2 CAVET as a Power Switch; High Breakdown Voltage; Low On-State Resistance; 3.3 Switching Performance of the CAVET; 3.3.1 Discussion of the Fabrication Process; Planar CAVET with Mg-Implanted CBL; Planar CAVET with Mg-doped CBL; Planar CAVETs with Regrown Aperture Region

CAVET with Aperture Region Formed by Si Ion Implantation3.3.2 Trench CAVET; Operation Principle; 3.4 MOSFETs; 3.4.1 Regrowth-Based MOSFET (OGFET); Operation Principle of the OGFET; 3.4.2 OGFET Switching Performance; 3.5 Conclusion; References; 4 Reliability of GaN-Based Power Devices; 4.1 Off-State Time-Dependent Degradation Mechanisms; 4.2 Time-Dependent Failure of Structures with P-Type Gate; 4.3 Positive and Negative Bias Threshold Voltage Instabilities in MISHEMT Structures; 4.3.1 Positive Bias Threshold Voltage Instabilities in MISHEMTs

4.3.2 Negative Bias-Induced Threshold Voltage Instability4.3.3 Constant Source Current-Induced Degradation; 4.4 Conclusions; References; 5 Validating GaN Robustness; 5.1 Introduction; 5.1.1 Reliability Issues Specific to GaN Power Transistors; 5.1.2 Switching Safe Operating Area (SSOA); 5.2 Reliability Validation on Hybrid-Drain-Embedded Gate Injection Transistor (HD-GIT); 5.2.1 Device Structure; 5.2.2 Fundamental Reliability Tests; 5.2.3 Short-Time Switching Safe Operating Area (sSSOA); 5.2.4 Dynamic High-Temperature Operation Life (D-HTOL) Test