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Intro; Preface; The Organization of CSI-2015; Contents; About the Editor; 1 A Mathematical AI-Based Diet Analysis and Transformation Model; Abstract; 1 Introduction; 2 Problem Statement; 3 Energy Requirements and Its Evaluation; 3.1 Nutrients Consideration; 4 Fuzzy Arithmetic and Computation; 4.1 Preliminaries; 5 Tabu Search Background; 6 Proposed Work; 6.1 Diet Analysis Module; 6.2 Optimization Module; 6.3 Diet Transformation Module; 7 Concluding Discussion; Declaration; References; 2 Energy Efficient Measures for Sustainable Development of Data Centers; Abstract; 1 Introduction
2 Scope of Energy Efficient Technologies and Techniques in Data Centers3 Energy Saving in Electrical System; 4 Cooling System; 5 IT Equipment; 6 Operation and Maintenance in Data Center; 7 Conclusion; 8 Future Scope; References; 3 Analysis on Multiple Combinations of Series-Parallel Connections of Super Capacitors for Maximum Energy Transferring to Load in Minimum Time; Abstract; 1 Introduction; 1.1 Proposed Scheme; 1.2 Basic Scheme; 2 Case-1; 3 Case-2; 4 Case-3; 5 Conclusion; References; 4 Design and Simulation of OTA Using 45 nm Technology; Abstract; 1 Introduction
2 Device Structure and Features3 Operational Transconductance Amplifier; 3.1 Results; 4 Conclusion; References; 5 Design and Analysis of Microstrip Patch Antenna Using DRAF; Abstract; 1 Introduction; 2 Antenna Design; 2.1 Design of Microstrip Triangular Patch Antenna with Side Length a = 25 mm; 2.2 Design of Microstrip Triangular Patch Antenna with Side Length a = 30 mm; 3 Simulated Results; 4 Conclusion; Acknowledgements; References; 6 Principal Component Analysis-Based Block Diagonalization Precoding Algorithm for MU-MIMO System; Abstract; 1 Introduction; 1.1 Organization; 1.2 Notation
2 MU-MIMO System Model3 Proposed PCA-Based Precoding Algorithm; 4 Performance Analysis; 5 Conclusion; References; 7 Low-Power High-Performance Multitransform Architecture Using Run-Time Reconfigurable Adder for FPGA and ASIC Implementation; Abstract; 1 Introduction; 2 Multitransform Architecture; 3 Proposed Adder; 4 Performance Evaluation and Comparison; 4.1 FPGA Implementation; 4.2 ASIC Implementation; 5 Conclusion and Future Scope; Acknowledgements; References; 8 A Review of Dynamic Scheduling Algorithms for Homogeneous and Heterogeneous Systems; Abstract; 1 Introduction
2 Homogeneous and Heterogeneous Systems2.1 Heterogeneous System; 2.2 Homogeneous System; 3 Review of Dynamic Scheduling Algorithms (DSA); 3.1 The Earliest Time First (ETF) Algorithm; 3.2 Dynamic Level Scheduling (DLS) Algorithm; 3.3 The Earliest Deadline First (EDF) Algorithm; 3.4 Online Scheduling of Dynamic Task Graph (OSDTG); 3.5 Dynamic Load Balancing Using Task-Transfer Probabilities (DLBTTP); 3.6 Dynamic Task Scheduling (DTS) Algorithm; 3.7 DLS Algorithm with Genetic Operators (DLSAGO); 3.8 Dynamic Task Graph Scheduling with Fault-Tolerant (FTDTGS); 3.9 DTS with Load Balancing (DTSLB)
2 Scope of Energy Efficient Technologies and Techniques in Data Centers3 Energy Saving in Electrical System; 4 Cooling System; 5 IT Equipment; 6 Operation and Maintenance in Data Center; 7 Conclusion; 8 Future Scope; References; 3 Analysis on Multiple Combinations of Series-Parallel Connections of Super Capacitors for Maximum Energy Transferring to Load in Minimum Time; Abstract; 1 Introduction; 1.1 Proposed Scheme; 1.2 Basic Scheme; 2 Case-1; 3 Case-2; 4 Case-3; 5 Conclusion; References; 4 Design and Simulation of OTA Using 45 nm Technology; Abstract; 1 Introduction
2 Device Structure and Features3 Operational Transconductance Amplifier; 3.1 Results; 4 Conclusion; References; 5 Design and Analysis of Microstrip Patch Antenna Using DRAF; Abstract; 1 Introduction; 2 Antenna Design; 2.1 Design of Microstrip Triangular Patch Antenna with Side Length a = 25 mm; 2.2 Design of Microstrip Triangular Patch Antenna with Side Length a = 30 mm; 3 Simulated Results; 4 Conclusion; Acknowledgements; References; 6 Principal Component Analysis-Based Block Diagonalization Precoding Algorithm for MU-MIMO System; Abstract; 1 Introduction; 1.1 Organization; 1.2 Notation
2 MU-MIMO System Model3 Proposed PCA-Based Precoding Algorithm; 4 Performance Analysis; 5 Conclusion; References; 7 Low-Power High-Performance Multitransform Architecture Using Run-Time Reconfigurable Adder for FPGA and ASIC Implementation; Abstract; 1 Introduction; 2 Multitransform Architecture; 3 Proposed Adder; 4 Performance Evaluation and Comparison; 4.1 FPGA Implementation; 4.2 ASIC Implementation; 5 Conclusion and Future Scope; Acknowledgements; References; 8 A Review of Dynamic Scheduling Algorithms for Homogeneous and Heterogeneous Systems; Abstract; 1 Introduction
2 Homogeneous and Heterogeneous Systems2.1 Heterogeneous System; 2.2 Homogeneous System; 3 Review of Dynamic Scheduling Algorithms (DSA); 3.1 The Earliest Time First (ETF) Algorithm; 3.2 Dynamic Level Scheduling (DLS) Algorithm; 3.3 The Earliest Deadline First (EDF) Algorithm; 3.4 Online Scheduling of Dynamic Task Graph (OSDTG); 3.5 Dynamic Load Balancing Using Task-Transfer Probabilities (DLBTTP); 3.6 Dynamic Task Scheduling (DTS) Algorithm; 3.7 DLS Algorithm with Genetic Operators (DLSAGO); 3.8 Dynamic Task Graph Scheduling with Fault-Tolerant (FTDTGS); 3.9 DTS with Load Balancing (DTSLB)