TY  - GEN
DO  - 10.1007/978-3-319-95513-1
DO  - doi
T1  - Formal verification of floating-point hardware design :a mathematical approach /
AU  - Russinoff, David,
CN  - QA76.9.F67
ID  - 861132
KW  - Formal methods (Computer science)
KW  - Floating-point arithmetic.
KW  - System design.
SN  - 9783319955131
SN  - 3319955136
TI  - Formal verification of floating-point hardware design :a mathematical approach /
LK  - https://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-95513-1
UR  - https://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-319-95513-1
ER  -