@article{923628,
      author = {Farahmandi, Farimah, and Huang, Yuanwen, and Mishra,  Prabhat,},
      url = {http://library.usi.edu/record/923628},
      title = {System-on-chip security : validation and verification /},
      abstract = {This book describes a wide variety of System-on-Chip (SoC)  security threats and vulnerabilities, as well as their  sources, in each stage of a design life cycle. The authors  discuss a wide variety of state-of-the-art security  verification and validation approaches such as formal  methods and side-channel analysis, as well as  simulation-based security and trust validation approaches.  This book provides a comprehensive reference for system on  chip designers and verification and validation engineers  interested in verifying security and trust of heterogeneous  SoCs. Outlines a wide variety of hardware security threats  and vulnerabilities as well as their sources in each of the  stages of a design life cycle; Summarizes unsafe current  design practices that lead to security and trust  vulnerabilities; Covers state-of-the-art techniques as well  as ongoing research efforts in developing scalable security  validation using formal methods including symbolic algebra,  model checkers, SAT solvers, and theorem provers; Explains  how to leverage security validation approaches to prevent  side-channel attacks; Presents automated debugging and  patching techniques in the presence of security  vulnerabilities; Includes case studies for security  validation of arithmetic circuits, controller designs, as  well as processor-based SoCs.},
      doi = {https://doi.org/10.1007/978-3-030-30},
      recid = {923628},
      pages = {1 online resource (xix, 289 pages) :},
}