000932608 000__ 03258cam\a2200469Ia\4500
000932608 001__ 932608
000932608 005__ 20230306151614.0
000932608 006__ m\\\\\o\\d\\\\\\\\
000932608 007__ cr\un\nnnunnun
000932608 008__ 200510s2020\\\\sz\\\\\\ob\\\\001\0\eng\d
000932608 019__ $$a1155878338$$a1156769748$$a1157245147$$a1157553219$$a1158362021
000932608 020__ $$a9783030442828$$q(electronic book)
000932608 020__ $$a3030442829$$q(electronic book)
000932608 020__ $$z3030442810
000932608 020__ $$z9783030442811
000932608 0247_ $$a10.1007/978-3-030-44
000932608 0247_ $$a10.1007/978-3-030-44282-8$$2doi
000932608 035__ $$aSP(OCoLC)on1153532045
000932608 035__ $$aSP(OCoLC)1153532045$$z(OCoLC)1155878338$$z(OCoLC)1156769748$$z(OCoLC)1157245147$$z(OCoLC)1157553219$$z(OCoLC)1158362021
000932608 040__ $$aYDX$$beng$$cYDX$$dGW5XE$$dLQU$$dUPM$$dOCLCF$$dEBLCP
000932608 049__ $$aISEA
000932608 050_4 $$aTS171.8
000932608 08204 $$a620/.0042$$223
000932608 1001_ $$aGoli, Mehran.
000932608 24510 $$aAutomated analysis of virtual prototypes at the electronic system level :$$bdesign understanding and applications /$$cMehran Goli, Rolf Drechsler.
000932608 260__ $$aCham :$$bSpringer,$$c2020.
000932608 300__ $$a1 online resource
000932608 336__ $$atext$$btxt$$2rdacontent
000932608 337__ $$acomputer$$bc$$2rdamedia
000932608 338__ $$aonline resource$$bcr$$2rdacarrier
000932608 347__ $$atext file$$bPDF$$2rda
000932608 504__ $$aIncludes bibliographical references and index.
000932608 5050_ $$aChapter 1. Introduction -- Chapter 2. Background -- Chapter 3. Design Understanding Methodology -- Chapter 4. Application I: Verification -- Chapter 5. Application II: Security Validation -- Chapter 6. Application III: Design Space Exploration -- Chapter 7. Conclusion.
000932608 506__ $$aAccess limited to authorized users.
000932608 520__ $$aThis book describes a set of SystemC-based virtual prototype analysis methodologies, including design understanding, verification, security validation, and design space exploration. Readers will gain an overview of the latest research results in the field of Electronic Design Automation (EDA) at the Electronic System Level (ESL). The methodologies discussed enable readers to tackle easily key tasks and applications in the design process. Provides an extensive introduction to the field of SystemC-based virtual prototype (VP) analysis at the electronic system level; Describes a design understanding methodology from both debugger-based and compiler-based perspectives; Illustrates a semi-formal verification approach to check the validity of a given VP against its specification, user-defined rules and protocol; Discusses a security validation approach to validate the run-time behavior of a given VP-based SoC against security threat models, such as information leakage (confidentiality) and unauthorized access to data in a memory (integrity); Describes a design space exploration approach for SystemC-based VPs to guide designers to know under which error limits, different portions of a given VP can be approximated at different granularity levels.
000932608 650_0 $$aPrototypes, Engineering.
000932608 7001_ $$aDrechsler, Rolf.
000932608 77608 $$iPrint version: $$z3030442810$$z9783030442811$$w(OCoLC)1142509897
000932608 852__ $$bebk
000932608 85640 $$3SpringerLink$$uhttps://univsouthin.idm.oclc.org/login?url=http://link.springer.com/10.1007/978-3-030-44282-8$$zOnline Access$$91397441.1
000932608 909CO $$ooai:library.usi.edu:932608$$pGLOBAL_SET
000932608 980__ $$aEBOOK
000932608 980__ $$aBIB
000932608 982__ $$aEbook
000932608 983__ $$aOnline
000932608 994__ $$a92$$bISE