subjectheading:[Verilog (Computer hardware description language)] - Search Results - University of Southern Indiana

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1.	SystemVerilog assertions and functional coverage : guide to language, methodology and applications / Ashok B. Mehta. Mehta, Ashok B., author. [Cham], Switzerland : Springer, 2016. 2016 TK7885.7 .M448 2016 \| View e-resource \| Available Online \| Detailed record - Similar records
2.	System Verilog assertions and functional coverage : guide to language, methodology and applications / Ashok B. Mehta. Mehta, Ashok B., author. Cham : Springer, [2020] ©2020 TK7885.7 .M44 2020eb \| View e-resource \| Available Online \| Detailed record - Similar records
3.	Quick start guide to Verilog / Brock J. LaMeres. LaMeres, Brock J. Cham : Springer, ©2019. TK7885.7 .L36 2019 \| View e-resource \| Available Online \| Detailed record - Similar records
4.	Computer principles and design in Verilog HDL / Yamin Li. Li, Yamin, author. Singapore : Wiley, 2015. ©2015 TK7885.7 .L5 2015eb \| View e-resource \| Available Online \| Detailed record - Similar records
5.	Verilog Quickstart [electronic resource] : a practical guide to simulation and synthesis in Verilog / James M. Lee. Lee, James M., 1962- Boston : Kluwer Academic Publishers, 2002. TK7885.7 .L44 2002eb \| View e-resource \| Available Online \| Detailed record - Similar records
6.	FSM-based digital design using Verilog HDL [electronic resource] / Peter Minns, Ian Elliott. Minns, Peter D.; Elliott, Ian D. Chichester, England ; Hoboken, NJ : J. Wiley & Sons, c2008. TK7885.7 .M54 2008eb \| View e-resource \| Available Online \| Detailed record - Similar records
7.	FPGA prototyping by Verilog examples [electronic resource] : Xilinx Spartan -3 version / Pong P. Chu. Chu, Pong P., 1959- Hoboken, N.J. : J. Wiley & Sons, c2008. TK7895.G36 C484 2008eb \| View e-resource \| Available Online \| Detailed record - Similar records
8.	A practical guide to Verilog-A : mastering the modeling language for analog devices, circuits, and systems / Slobodan Mijalković. Mijalković, S. (Slobodan), 1959- author. Berkeley, CA : Apress L.P., 2022. TK7867 \| View e-resource \| Available Online \| Detailed record - Similar records
9.	Digital logic design using Verilog : coding and RTL synthesis / Vaibbhav Taraate. Taraate, Vaibbhav, author. Singapore : Springer, [2022] ©2022 TK7868.L6 T37 2022eb \| View e-resource \| Available Online \| Detailed record - Similar records
10.	ASIC design and synthesis : RTL design using Verilog / Vaibbhav Taraate. Taraate, Vaibbhav. Singapore : Springer, 2021. TK7874.6 \| View e-resource \| Available Online \| Detailed record - Similar records

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