Intro
Foreword by Robin Biesbroek
Foreword by Ana Ambrosio
Foreword by Olivier L. de Weck
Foreword by René Laufer
Foreword by Peter Martinez
Preface
Donation for Life
Contents
List of Abbreviations
1 System Design Concept
1.1 Introduction
1.2 The Onboard Computer Concept
1.3 The PCDU with Enhanced Functionality
1.4 CPU-Board Reconfiguration Control
1.4.1 Component Functions During Failure Handling
1.4.2 A Combined Controller for PCDU and CPU FDIR
1.4.3 Failure Management with the Combined-Controller

1.4.4 Advantages of the Combined-Controller Approach
1.5 CDPI Software Functions
1.5.1 Software Initialization
1.5.2 SpaceWire Network Initialization and FDIR
1.5.3 Remote-Board Reconfiguration Management
1.6 Firmware Functions
1.6.1 Pulse per Second Signal Management
1.6.2 I/O-Board Interface Operation and Group Tailoring
1.6.3 Ground/Space Communication
1.7 Board Identification
1.8 Completeness of System Architecture
1.9 Outlook for Future Missions
2 OBC CPU-Boards
2.1 Introduction
2.2 GR712RC-SBC
2.2.1 Board Block Diagram
2.2.2 Processor

2.2.3 Memory
2.2.4 Interface Circuits
2.2.5 Auxiliary Circuits
2.2.6 Mechanical Layout and Constraints
2.2.7 PCB Design and Constraints
2.2.8 Housing and Connectors
2.2.9 Components
3 OBC Periphery Boards
3.1 Common Design for SpaceWire Routers, I/O and CCSDS-Boards
3.2 OBC Periphery Boards Overview
3.3 FPGA-Mezzanine
3.3.1 FPGA
3.3.2 Memory
3.3.3 FPGA Configuration
3.4 Carrier
3.4.1 JTAG
3.4.2 Configurable IO
3.4.3 SpaceWire
3.4.4 Ethernet
3.5 System Architecture
3.5.1 Board Implementation
3.5.2 System Grounding
3.5.3 Power Budget

3.5.4 Physical Structure
3.5.5 Loki-Board IO Connectors
3.5.6 Loki-Board Radiation Characteristic
3.5.7 Loki-Board Temperature Limits
4 SpaceWire Router Boards
4.1 SpaceWire Routers for Ground and Flight
4.2 General Router Functions
4.3 Router Board Structure
4.4 Peripherals
4.4.1 Peripheral Identification & Configuration (PID)
4.4.2 Memory and Applications
4.4.3 SpaceWire Ports
4.4.4 SpaceWire-Ethernet Bridge
4.4.5 FPGA Resources
4.4.6 Configuration
4.4.7 PPS Interfaces
4.5 Router-Board Programmers Model
4.5.1 RMAP0

4.5.2 Router Configuration Space
4.5.3 Port0 RMAP SpaceWire Codec
4.5.4 Port0 RMAP PPS
4.5.5 MRAM
4.5.6 Ethernet
5 I/O-Boards
5.1 General I/O-Board Functions
5.2 I/O Board Structure
5.3 Memory and Applications
5.4 Peripherals
5.4.1 I/O-Board Internal Router
5.4.2 SpaceWire Ports
5.4.3 UART Interfaces
5.4.4 GPIO Interfaces
5.5 I/O Board Programmers Model
5.5.1 RMAP0
5.5.2 Router Configuration Space
5.5.3 SpaceWire Codec
5.5.4 MRAM
5.5.5 Configurable I/O Interfaces
5.5.6 UART
5.5.7 GPIO
6 CCSDS Decoder/Encoder Boards